| Index: src/compiler/simd-scalar-lowering.cc
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| diff --git a/src/compiler/simd-scalar-lowering.cc b/src/compiler/simd-scalar-lowering.cc
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| index 601ccb20a2bab27682adffe0140d2860691ddd5e..87a5e07281f4462d8406edd181bc218dd15e1ff7 100644
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| --- a/src/compiler/simd-scalar-lowering.cc
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| +++ b/src/compiler/simd-scalar-lowering.cc
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| @@ -72,16 +72,26 @@ void SimdScalarLowering::LowerGraph() {
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|  }
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|  
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|  #define FOREACH_INT32X4_OPCODE(V) \
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| -  V(Int32x4Add)                   \
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| -  V(Int32x4ExtractLane)           \
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|    V(Int32x4Splat)                 \
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| -  V(Int32x4ReplaceLane)
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| +  V(Int32x4ExtractLane)           \
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| +  V(Int32x4ReplaceLane)           \
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| +  V(Int32x4Add)                   \
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| +  V(Int32x4Sub)                   \
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| +  V(Int32x4Mul)                   \
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| +  V(Simd128And)                   \
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| +  V(Simd128Or)                    \
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| +  V(Simd128Xor)
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|  
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|  #define FOREACH_FLOAT32X4_OPCODE(V) \
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| -  V(Float32x4Add)                   \
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| -  V(Float32x4ExtractLane)           \
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|    V(Float32x4Splat)                 \
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| -  V(Float32x4ReplaceLane)
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| +  V(Float32x4ExtractLane)           \
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| +  V(Float32x4ReplaceLane)           \
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| +  V(Float32x4Add)                   \
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| +  V(Float32x4Sub)                   \
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| +  V(Float32x4Mul)                   \
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| +  V(Float32x4Div)                   \
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| +  V(Float32x4Min)                   \
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| +  V(Float32x4Max)
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|  
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|  void SimdScalarLowering::SetLoweredType(Node* node, Node* output) {
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|    switch (node->opcode()) {
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| @@ -377,14 +387,30 @@ void SimdScalarLowering::LowerNode(Node* node) {
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|        }
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|        break;
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|      }
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| -    case IrOpcode::kInt32x4Add: {
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| -      LowerBinaryOp(node, rep_type, machine()->Int32Add());
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| -      break;
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| -    }
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| -    case IrOpcode::kFloat32x4Add: {
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| -      LowerBinaryOp(node, rep_type, machine()->Float32Add());
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| -      break;
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| -    }
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| +#define I32X4_BINOP_CASE(opcode, instruction)                \
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| +  case IrOpcode::opcode: {                                   \
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| +    LowerBinaryOp(node, rep_type, machine()->instruction()); \
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| +    break;                                                   \
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| +  }
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| +      I32X4_BINOP_CASE(kInt32x4Add, Int32Add)
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| +      I32X4_BINOP_CASE(kInt32x4Sub, Int32Sub)
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| +      I32X4_BINOP_CASE(kInt32x4Mul, Int32Mul)
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| +      I32X4_BINOP_CASE(kSimd128And, Word32And)
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| +      I32X4_BINOP_CASE(kSimd128Or, Word32Or)
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| +      I32X4_BINOP_CASE(kSimd128Xor, Word32Xor)
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| +#undef I32X4_BINOP_CASE
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| +#define F32X4_BINOP_CASE(name)                                 \
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| +  case IrOpcode::kFloat32x4##name: {                           \
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| +    LowerBinaryOp(node, rep_type, machine()->Float32##name()); \
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| +    break;                                                     \
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| +  }
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| +      F32X4_BINOP_CASE(Add)
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| +      F32X4_BINOP_CASE(Sub)
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| +      F32X4_BINOP_CASE(Mul)
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| +      F32X4_BINOP_CASE(Div)
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| +      F32X4_BINOP_CASE(Min)
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| +      F32X4_BINOP_CASE(Max)
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| +#undef F32X4_BINOP_CASE
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|      case IrOpcode::kInt32x4Splat:
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|      case IrOpcode::kFloat32x4Splat: {
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|        Node* rep_node[kMaxLanes];
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| 
 |