OLD | NEW |
1 // Copyright 2014 The Crashpad Authors. All rights reserved. | 1 // Copyright 2014 The Crashpad Authors. All rights reserved. |
2 // | 2 // |
3 // Licensed under the Apache License, Version 2.0 (the "License"); | 3 // Licensed under the Apache License, Version 2.0 (the "License"); |
4 // you may not use this file except in compliance with the License. | 4 // you may not use this file except in compliance with the License. |
5 // You may obtain a copy of the License at | 5 // You may obtain a copy of the License at |
6 // | 6 // |
7 // http://www.apache.org/licenses/LICENSE-2.0 | 7 // http://www.apache.org/licenses/LICENSE-2.0 |
8 // | 8 // |
9 // Unless required by applicable law or agreed to in writing, software | 9 // Unless required by applicable law or agreed to in writing, software |
10 // distributed under the License is distributed on an "AS IS" BASIS, | 10 // distributed under the License is distributed on an "AS IS" BASIS, |
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
12 // See the License for the specific language governing permissions and | 12 // See the License for the specific language governing permissions and |
13 // limitations under the License. | 13 // limitations under the License. |
14 | 14 |
15 #include "snapshot/cpu_context.h" | 15 #include "snapshot/cpu_context.h" |
16 | 16 |
17 #include <string.h> | 17 #include <string.h> |
18 #include <sys/types.h> | 18 #include <sys/types.h> |
19 | 19 |
20 #include "base/macros.h" | 20 #include "base/macros.h" |
21 #include "gtest/gtest.h" | 21 #include "gtest/gtest.h" |
| 22 #include "test/hex_string.h" |
22 | 23 |
23 namespace crashpad { | 24 namespace crashpad { |
24 namespace test { | 25 namespace test { |
25 namespace { | 26 namespace { |
26 | 27 |
27 enum ExponentValue { | 28 enum ExponentValue { |
28 kExponentAllZero = 0, | 29 kExponentAllZero = 0, |
29 kExponentAllOne, | 30 kExponentAllOne, |
30 kExponentNormal, | 31 kExponentNormal, |
31 }; | 32 }; |
32 | 33 |
33 enum FractionValue { | 34 enum FractionValue { |
34 kFractionAllZero = 0, | 35 kFractionAllZero = 0, |
35 kFractionNormal, | 36 kFractionNormal, |
36 }; | 37 }; |
37 | 38 |
38 //! \brief Initializes an x87 register to a known bit pattern. | 39 //! \brief Initializes an x87 register to a known bit pattern. |
39 //! | 40 //! |
40 //! \param[out] st_mm The x87 register to initialize. The reserved portion of | 41 //! \param[out] st_mm The x87 register to initialize. The reserved portion of |
41 //! the register is always zeroed out. | 42 //! the register is always zeroed out. |
42 //! \param[in] exponent_value The bit pattern to use for the exponent. If this | 43 //! \param[in] exponent_value The bit pattern to use for the exponent. If this |
43 //! is kExponentAllZero, the sign bit will be set to `1`, and if this is | 44 //! is kExponentAllZero, the sign bit will be set to `1`, and if this is |
44 //! kExponentAllOne, the sign bit will be set to `0`. This tests that the | 45 //! kExponentAllOne, the sign bit will be set to `0`. This tests that the |
45 //! implementation doesn’t erroneously consider the sign bit to be part of | 46 //! implementation doesn’t erroneously consider the sign bit to be part of |
46 //! the exponent. This may also be kExponentNormal, indicating that the | 47 //! the exponent. This may also be kExponentNormal, indicating that the |
47 //! exponent shall neither be all zeroes nor all ones. | 48 //! exponent shall neither be all zeroes nor all ones. |
48 //! \param[in] j_bit The value to use for the “J bit” (“integer bit”). | 49 //! \param[in] j_bit The value to use for the “J bit” (“integer bit”). |
49 //! \param[in] fraction_value If kFractionAllZero, the fraction will be zeroed | 50 //! \param[in] fraction_value If kFractionAllZero, the fraction will be zeroed |
50 //! out. If kFractionNormal, the fraction will not be all zeroes. | 51 //! out. If kFractionNormal, the fraction will not be all zeroes. |
51 void SetX87Register(CPUContextX86::X87OrMMXRegister* st_mm, | 52 void SetX87Register(CPUContextX86::X87Register* st, |
52 ExponentValue exponent_value, | 53 ExponentValue exponent_value, |
53 bool j_bit, | 54 bool j_bit, |
54 FractionValue fraction_value) { | 55 FractionValue fraction_value) { |
55 switch (exponent_value) { | 56 switch (exponent_value) { |
56 case kExponentAllZero: | 57 case kExponentAllZero: |
57 st_mm->st[9] = 0x80; | 58 (*st)[9] = 0x80; |
58 st_mm->st[8] = 0; | 59 (*st)[8] = 0; |
59 break; | 60 break; |
60 case kExponentAllOne: | 61 case kExponentAllOne: |
61 st_mm->st[9] = 0x7f; | 62 (*st)[9] = 0x7f; |
62 st_mm->st[8] = 0xff; | 63 (*st)[8] = 0xff; |
63 break; | 64 break; |
64 case kExponentNormal: | 65 case kExponentNormal: |
65 st_mm->st[9] = 0x55; | 66 (*st)[9] = 0x55; |
66 st_mm->st[8] = 0x55; | 67 (*st)[8] = 0x55; |
67 break; | 68 break; |
68 } | 69 } |
69 | 70 |
70 uint8_t fraction_pattern = fraction_value == kFractionAllZero ? 0 : 0x55; | 71 uint8_t fraction_pattern = fraction_value == kFractionAllZero ? 0 : 0x55; |
71 memset(&st_mm->st[0], fraction_pattern, 8); | 72 memset(st, fraction_pattern, 8); |
72 | 73 |
73 if (j_bit) { | 74 if (j_bit) { |
74 st_mm->st[7] |= 0x80; | 75 (*st)[7] |= 0x80; |
75 } else { | 76 } else { |
76 st_mm->st[7] &= ~0x80; | 77 (*st)[7] &= ~0x80; |
77 } | 78 } |
| 79 } |
78 | 80 |
| 81 //! \brief Initializes an x87 register to a known bit pattern. |
| 82 //! |
| 83 //! This behaves as SetX87Register() but also clears the reserved portion of the |
| 84 //! field as used in the `fxsave` format. |
| 85 void SetX87OrMMXRegister(CPUContextX86::X87OrMMXRegister* st_mm, |
| 86 ExponentValue exponent_value, |
| 87 bool j_bit, |
| 88 FractionValue fraction_value) { |
| 89 SetX87Register(&st_mm->st, exponent_value, j_bit, fraction_value); |
79 memset(st_mm->st_reserved, 0, sizeof(st_mm->st_reserved)); | 90 memset(st_mm->st_reserved, 0, sizeof(st_mm->st_reserved)); |
80 } | 91 } |
81 | 92 |
| 93 TEST(CPUContextX86, FxsaveToFsave) { |
| 94 // Establish a somewhat plausible fxsave state. Use nonzero values for |
| 95 // reserved fields and things that aren’t present in fsave. |
| 96 CPUContextX86::Fxsave fxsave; |
| 97 fxsave.fcw = 0x027f; // mask exceptions, 53-bit precision, round to nearest |
| 98 fxsave.fsw = 1 << 11; // top = 1: logical 0-7 maps to physical 1-7, 0 |
| 99 fxsave.ftw = 0x1f; // physical 5-7 (logical 4-6) empty |
| 100 fxsave.reserved_1 = 0x5a; |
| 101 fxsave.fop = 0x1fe; // fsin |
| 102 fxsave.fpu_ip = 0x76543210; |
| 103 fxsave.fpu_cs = 0x0007; |
| 104 fxsave.reserved_2 = 0x5a5a; |
| 105 fxsave.fpu_dp = 0xfedcba98; |
| 106 fxsave.fpu_ds = 0x000f; |
| 107 fxsave.reserved_3 = 0x5a5a; |
| 108 fxsave.mxcsr = 0x1f80; |
| 109 fxsave.mxcsr_mask = 0xffff; |
| 110 SetX87Register( |
| 111 &fxsave.st_mm[0].st, kExponentNormal, true, kFractionAllZero); // valid |
| 112 SetX87Register( |
| 113 &fxsave.st_mm[1].st, kExponentAllZero, false, kFractionAllZero); // zero |
| 114 SetX87Register( |
| 115 &fxsave.st_mm[2].st, kExponentAllOne, true, kFractionAllZero); // spec. |
| 116 SetX87Register( |
| 117 &fxsave.st_mm[3].st, kExponentAllOne, true, kFractionNormal); // spec. |
| 118 SetX87Register( |
| 119 &fxsave.st_mm[4].st, kExponentAllZero, false, kFractionAllZero); |
| 120 SetX87Register( |
| 121 &fxsave.st_mm[5].st, kExponentAllZero, false, kFractionAllZero); |
| 122 SetX87Register( |
| 123 &fxsave.st_mm[6].st, kExponentAllZero, false, kFractionAllZero); |
| 124 SetX87Register( |
| 125 &fxsave.st_mm[7].st, kExponentNormal, true, kFractionNormal); // valid |
| 126 for (size_t index = 0; index < arraysize(fxsave.st_mm); ++index) { |
| 127 memset(&fxsave.st_mm[index].st_reserved, |
| 128 0x5a, |
| 129 sizeof(fxsave.st_mm[index].st_reserved)); |
| 130 } |
| 131 memset(&fxsave.xmm, 0x5a, sizeof(fxsave) - offsetof(decltype(fxsave), xmm)); |
| 132 |
| 133 CPUContextX86::Fsave fsave; |
| 134 CPUContextX86::FxsaveToFsave(fxsave, &fsave); |
| 135 |
| 136 // Everything should have come over from fxsave. Reserved fields should be |
| 137 // zero. |
| 138 EXPECT_EQ(fxsave.fcw, fsave.fcw); |
| 139 EXPECT_EQ(0, fsave.reserved_1); |
| 140 EXPECT_EQ(fxsave.fsw, fsave.fsw); |
| 141 EXPECT_EQ(0, fsave.reserved_2); |
| 142 EXPECT_EQ(0xfe90, fsave.ftw); // FxsaveToFsaveTagWord |
| 143 EXPECT_EQ(0, fsave.reserved_3); |
| 144 EXPECT_EQ(fxsave.fpu_ip, fsave.fpu_ip); |
| 145 EXPECT_EQ(fxsave.fpu_cs, fsave.fpu_cs); |
| 146 EXPECT_EQ(fxsave.fop, fsave.fop); |
| 147 EXPECT_EQ(fxsave.fpu_dp, fsave.fpu_dp); |
| 148 EXPECT_EQ(fxsave.fpu_ds, fsave.fpu_ds); |
| 149 EXPECT_EQ(0, fsave.reserved_4); |
| 150 for (size_t index = 0; index < arraysize(fsave.st); ++index) { |
| 151 EXPECT_EQ(BytesToHexString(fxsave.st_mm[index].st, |
| 152 arraysize(fxsave.st_mm[index].st)), |
| 153 BytesToHexString(fsave.st[index], arraysize(fsave.st[index]))) |
| 154 << "index " << index; |
| 155 } |
| 156 } |
| 157 |
| 158 TEST(CPUContextX86, FsaveToFxsave) { |
| 159 // Establish a somewhat plausible fsave state. Use nonzero values for |
| 160 // reserved fields. |
| 161 CPUContextX86::Fsave fsave; |
| 162 fsave.fcw = 0x0300; // unmask exceptions, 64-bit precision, round to nearest |
| 163 fsave.reserved_1 = 0xa5a5; |
| 164 fsave.fsw = 2 << 11; // top = 2: logical 0-7 maps to physical 2-7, 0-1 |
| 165 fsave.reserved_2 = 0xa5a5; |
| 166 fsave.ftw = 0xa9ff; // physical 0-3 (logical 6-7, 0-1) empty; physical 4 |
| 167 // (logical 2) zero; physical 5-7 (logical 3-5) special |
| 168 fsave.reserved_3 = 0xa5a5; |
| 169 fsave.fpu_ip = 0x456789ab; |
| 170 fsave.fpu_cs = 0x1013; |
| 171 fsave.fop = 0x01ee; // fldz |
| 172 fsave.fpu_dp = 0x0123cdef; |
| 173 fsave.fpu_ds = 0x2017; |
| 174 fsave.reserved_4 = 0xa5a5; |
| 175 SetX87Register(&fsave.st[0], kExponentAllZero, false, kFractionNormal); |
| 176 SetX87Register(&fsave.st[1], kExponentAllZero, true, kFractionNormal); |
| 177 SetX87Register( |
| 178 &fsave.st[2], kExponentAllZero, false, kFractionAllZero); // zero |
| 179 SetX87Register( |
| 180 &fsave.st[3], kExponentAllZero, true, kFractionAllZero); // spec. |
| 181 SetX87Register( |
| 182 &fsave.st[4], kExponentAllZero, false, kFractionNormal); // spec. |
| 183 SetX87Register( |
| 184 &fsave.st[5], kExponentAllZero, true, kFractionNormal); // spec. |
| 185 SetX87Register(&fsave.st[6], kExponentAllZero, false, kFractionAllZero); |
| 186 SetX87Register(&fsave.st[7], kExponentAllZero, true, kFractionAllZero); |
| 187 |
| 188 CPUContextX86::Fxsave fxsave; |
| 189 CPUContextX86::FsaveToFxsave(fsave, &fxsave); |
| 190 |
| 191 // Everything in fsave should have come over from there. Fields not present in |
| 192 // fsave and reserved fields should be zero. |
| 193 EXPECT_EQ(fsave.fcw, fxsave.fcw); |
| 194 EXPECT_EQ(fsave.fsw, fxsave.fsw); |
| 195 EXPECT_EQ(0xf0, fxsave.ftw); // FsaveToFxsaveTagWord |
| 196 EXPECT_EQ(0, fxsave.reserved_1); |
| 197 EXPECT_EQ(fsave.fop, fxsave.fop); |
| 198 EXPECT_EQ(fsave.fpu_ip, fxsave.fpu_ip); |
| 199 EXPECT_EQ(fsave.fpu_cs, fxsave.fpu_cs); |
| 200 EXPECT_EQ(0, fxsave.reserved_2); |
| 201 EXPECT_EQ(fsave.fpu_dp, fxsave.fpu_dp); |
| 202 EXPECT_EQ(fsave.fpu_ds, fxsave.fpu_ds); |
| 203 EXPECT_EQ(0, fxsave.reserved_3); |
| 204 EXPECT_EQ(0u, fxsave.mxcsr); |
| 205 EXPECT_EQ(0u, fxsave.mxcsr_mask); |
| 206 for (size_t index = 0; index < arraysize(fxsave.st_mm); ++index) { |
| 207 EXPECT_EQ(BytesToHexString(fsave.st[index], arraysize(fsave.st[index])), |
| 208 BytesToHexString(fxsave.st_mm[index].st, |
| 209 arraysize(fxsave.st_mm[index].st))) |
| 210 << "index " << index; |
| 211 EXPECT_EQ(std::string(arraysize(fxsave.st_mm[index].st_reserved) * 2, '0'), |
| 212 BytesToHexString(fxsave.st_mm[index].st_reserved, |
| 213 arraysize(fxsave.st_mm[index].st_reserved))) |
| 214 << "index " << index; |
| 215 } |
| 216 size_t unused_len = sizeof(fxsave) - offsetof(decltype(fxsave), xmm); |
| 217 EXPECT_EQ(std::string(unused_len * 2, '0'), |
| 218 BytesToHexString(fxsave.xmm, unused_len)); |
| 219 |
| 220 // Since the fsave format is a subset of the fxsave format, fsave-fxsave-fsave |
| 221 // should round-trip cleanly. |
| 222 CPUContextX86::Fsave fsave_2; |
| 223 CPUContextX86::FxsaveToFsave(fxsave, &fsave_2); |
| 224 |
| 225 // Clear the reserved fields in the original fsave structure, since they’re |
| 226 // expected to be clear in the copy. |
| 227 fsave.reserved_1 = 0; |
| 228 fsave.reserved_2 = 0; |
| 229 fsave.reserved_3 = 0; |
| 230 fsave.reserved_4 = 0; |
| 231 EXPECT_EQ(0, memcmp(&fsave, &fsave_2, sizeof(fsave))); |
| 232 } |
| 233 |
82 TEST(CPUContextX86, FxsaveToFsaveTagWord) { | 234 TEST(CPUContextX86, FxsaveToFsaveTagWord) { |
83 // The fsave tag word uses bit pattern 00 for valid, 01 for zero, 10 for | 235 // The fsave tag word uses bit pattern 00 for valid, 01 for zero, 10 for |
84 // “special”, and 11 for empty. Like the fxsave tag word, it is arranged by | 236 // “special”, and 11 for empty. Like the fxsave tag word, it is arranged by |
85 // physical register. The fxsave tag word determines whether a register is | 237 // physical register. The fxsave tag word determines whether a register is |
86 // empty, and analysis of the x87 register content distinguishes between | 238 // empty, and analysis of the x87 register content distinguishes between |
87 // valid, zero, and special. In the initializations below, comments show | 239 // valid, zero, and special. In the initializations below, comments show |
88 // whether a register is expected to be considered valid, zero, or special, | 240 // whether a register is expected to be considered valid, zero, or special, |
89 // except where the tag word is expected to indicate that it is empty. Each | 241 // except where the tag word is expected to indicate that it is empty. Each |
90 // combination appears twice: once where the fxsave tag word indicates a | 242 // combination appears twice: once where the fxsave tag word indicates a |
91 // nonempty register, and once again where it indicates an empty register. | 243 // nonempty register, and once again where it indicates an empty register. |
92 | 244 |
93 uint16_t fsw = 0 << 11; // top = 0: logical 0-7 maps to physical 0-7 | 245 uint16_t fsw = 0 << 11; // top = 0: logical 0-7 maps to physical 0-7 |
94 uint8_t fxsave_tag = 0x0f; // physical 4-7 (logical 4-7) empty | 246 uint8_t fxsave_tag = 0x0f; // physical 4-7 (logical 4-7) empty |
95 CPUContextX86::X87OrMMXRegister st_mm[8]; | 247 CPUContextX86::X87OrMMXRegister st_mm[8]; |
96 SetX87Register(&st_mm[0], kExponentNormal, false, kFractionNormal); // spec. | 248 SetX87OrMMXRegister( |
97 SetX87Register(&st_mm[1], kExponentNormal, true, kFractionNormal); // valid | 249 &st_mm[0], kExponentNormal, false, kFractionNormal); // spec. |
98 SetX87Register(&st_mm[2], kExponentNormal, false, kFractionAllZero); // spec. | 250 SetX87OrMMXRegister( |
99 SetX87Register(&st_mm[3], kExponentNormal, true, kFractionAllZero); // valid | 251 &st_mm[1], kExponentNormal, true, kFractionNormal); // valid |
100 SetX87Register(&st_mm[4], kExponentNormal, false, kFractionNormal); | 252 SetX87OrMMXRegister( |
101 SetX87Register(&st_mm[5], kExponentNormal, true, kFractionNormal); | 253 &st_mm[2], kExponentNormal, false, kFractionAllZero); // spec. |
102 SetX87Register(&st_mm[6], kExponentNormal, false, kFractionAllZero); | 254 SetX87OrMMXRegister( |
103 SetX87Register(&st_mm[7], kExponentNormal, true, kFractionAllZero); | 255 &st_mm[3], kExponentNormal, true, kFractionAllZero); // valid |
| 256 SetX87OrMMXRegister(&st_mm[4], kExponentNormal, false, kFractionNormal); |
| 257 SetX87OrMMXRegister(&st_mm[5], kExponentNormal, true, kFractionNormal); |
| 258 SetX87OrMMXRegister(&st_mm[6], kExponentNormal, false, kFractionAllZero); |
| 259 SetX87OrMMXRegister(&st_mm[7], kExponentNormal, true, kFractionAllZero); |
104 EXPECT_EQ(0xff22, | 260 EXPECT_EQ(0xff22, |
105 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); | 261 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); |
106 | 262 |
107 fsw = 2 << 11; // top = 2: logical 0-7 maps to physical 2-7, 0-1 | 263 fsw = 2 << 11; // top = 2: logical 0-7 maps to physical 2-7, 0-1 |
108 fxsave_tag = 0xf0; // physical 0-3 (logical 6-7, 0-1) empty | 264 fxsave_tag = 0xf0; // physical 0-3 (logical 6-7, 0-1) empty |
109 SetX87Register(&st_mm[0], kExponentAllZero, false, kFractionNormal); | 265 SetX87OrMMXRegister(&st_mm[0], kExponentAllZero, false, kFractionNormal); |
110 SetX87Register(&st_mm[1], kExponentAllZero, true, kFractionNormal); | 266 SetX87OrMMXRegister(&st_mm[1], kExponentAllZero, true, kFractionNormal); |
111 SetX87Register(&st_mm[2], kExponentAllZero, false, kFractionAllZero); // zero | 267 SetX87OrMMXRegister( |
112 SetX87Register(&st_mm[3], kExponentAllZero, true, kFractionAllZero); // spec. | 268 &st_mm[2], kExponentAllZero, false, kFractionAllZero); // zero |
113 SetX87Register(&st_mm[4], kExponentAllZero, false, kFractionNormal); // spec. | 269 SetX87OrMMXRegister( |
114 SetX87Register(&st_mm[5], kExponentAllZero, true, kFractionNormal); // spec. | 270 &st_mm[3], kExponentAllZero, true, kFractionAllZero); // spec. |
115 SetX87Register(&st_mm[6], kExponentAllZero, false, kFractionAllZero); | 271 SetX87OrMMXRegister( |
116 SetX87Register(&st_mm[7], kExponentAllZero, true, kFractionAllZero); | 272 &st_mm[4], kExponentAllZero, false, kFractionNormal); // spec. |
| 273 SetX87OrMMXRegister( |
| 274 &st_mm[5], kExponentAllZero, true, kFractionNormal); // spec. |
| 275 SetX87OrMMXRegister(&st_mm[6], kExponentAllZero, false, kFractionAllZero); |
| 276 SetX87OrMMXRegister(&st_mm[7], kExponentAllZero, true, kFractionAllZero); |
117 EXPECT_EQ(0xa9ff, | 277 EXPECT_EQ(0xa9ff, |
118 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); | 278 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); |
119 | 279 |
120 fsw = 5 << 11; // top = 5: logical 0-7 maps to physical 5-7, 0-4 | 280 fsw = 5 << 11; // top = 5: logical 0-7 maps to physical 5-7, 0-4 |
121 fxsave_tag = 0x5a; // physical 0, 2, 5, and 7 (logical 5, 0, 2, and 3) empty | 281 fxsave_tag = 0x5a; // physical 0, 2, 5, and 7 (logical 5, 0, 2, and 3) empty |
122 SetX87Register(&st_mm[0], kExponentAllOne, false, kFractionNormal); | 282 SetX87OrMMXRegister(&st_mm[0], kExponentAllOne, false, kFractionNormal); |
123 SetX87Register(&st_mm[1], kExponentAllOne, true, kFractionNormal); // spec. | 283 SetX87OrMMXRegister( |
124 SetX87Register(&st_mm[2], kExponentAllOne, false, kFractionAllZero); | 284 &st_mm[1], kExponentAllOne, true, kFractionNormal); // spec. |
125 SetX87Register(&st_mm[3], kExponentAllOne, true, kFractionAllZero); | 285 SetX87OrMMXRegister(&st_mm[2], kExponentAllOne, false, kFractionAllZero); |
126 SetX87Register(&st_mm[4], kExponentAllOne, false, kFractionNormal); // spec. | 286 SetX87OrMMXRegister(&st_mm[3], kExponentAllOne, true, kFractionAllZero); |
127 SetX87Register(&st_mm[5], kExponentAllOne, true, kFractionNormal); | 287 SetX87OrMMXRegister( |
128 SetX87Register(&st_mm[6], kExponentAllOne, false, kFractionAllZero); // spec. | 288 &st_mm[4], kExponentAllOne, false, kFractionNormal); // spec. |
129 SetX87Register(&st_mm[7], kExponentAllOne, true, kFractionAllZero); // spec. | 289 SetX87OrMMXRegister(&st_mm[5], kExponentAllOne, true, kFractionNormal); |
| 290 SetX87OrMMXRegister( |
| 291 &st_mm[6], kExponentAllOne, false, kFractionAllZero); // spec. |
| 292 SetX87OrMMXRegister( |
| 293 &st_mm[7], kExponentAllOne, true, kFractionAllZero); // spec. |
130 EXPECT_EQ(0xeebb, | 294 EXPECT_EQ(0xeebb, |
131 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); | 295 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); |
132 | 296 |
133 // This set set is just a mix of all of the possible tag types in a single | 297 // This set set is just a mix of all of the possible tag types in a single |
134 // register file. | 298 // register file. |
135 fsw = 1 << 11; // top = 1: logical 0-7 maps to physical 1-7, 0 | 299 fsw = 1 << 11; // top = 1: logical 0-7 maps to physical 1-7, 0 |
136 fxsave_tag = 0x1f; // physical 5-7 (logical 4-6) empty | 300 fxsave_tag = 0x1f; // physical 5-7 (logical 4-6) empty |
137 SetX87Register(&st_mm[0], kExponentNormal, true, kFractionAllZero); // valid | 301 SetX87OrMMXRegister( |
138 SetX87Register(&st_mm[1], kExponentAllZero, false, kFractionAllZero); // zero | 302 &st_mm[0], kExponentNormal, true, kFractionAllZero); // valid |
139 SetX87Register(&st_mm[2], kExponentAllOne, true, kFractionAllZero); // spec. | 303 SetX87OrMMXRegister( |
140 SetX87Register(&st_mm[3], kExponentAllOne, true, kFractionNormal); // spec. | 304 &st_mm[1], kExponentAllZero, false, kFractionAllZero); // zero |
141 SetX87Register(&st_mm[4], kExponentAllZero, false, kFractionAllZero); | 305 SetX87OrMMXRegister( |
142 SetX87Register(&st_mm[5], kExponentAllZero, false, kFractionAllZero); | 306 &st_mm[2], kExponentAllOne, true, kFractionAllZero); // spec. |
143 SetX87Register(&st_mm[6], kExponentAllZero, false, kFractionAllZero); | 307 SetX87OrMMXRegister( |
144 SetX87Register(&st_mm[7], kExponentNormal, true, kFractionNormal); // valid | 308 &st_mm[3], kExponentAllOne, true, kFractionNormal); // spec. |
| 309 SetX87OrMMXRegister(&st_mm[4], kExponentAllZero, false, kFractionAllZero); |
| 310 SetX87OrMMXRegister(&st_mm[5], kExponentAllZero, false, kFractionAllZero); |
| 311 SetX87OrMMXRegister(&st_mm[6], kExponentAllZero, false, kFractionAllZero); |
| 312 SetX87OrMMXRegister( |
| 313 &st_mm[7], kExponentNormal, true, kFractionNormal); // valid |
145 EXPECT_EQ(0xfe90, | 314 EXPECT_EQ(0xfe90, |
146 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); | 315 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); |
147 | 316 |
148 // In this set, everything is valid. | 317 // In this set, everything is valid. |
149 fsw = 0 << 11; // top = 0: logical 0-7 maps to physical 0-7 | 318 fsw = 0 << 11; // top = 0: logical 0-7 maps to physical 0-7 |
150 fxsave_tag = 0xff; // nothing empty | 319 fxsave_tag = 0xff; // nothing empty |
151 for (size_t index = 0; index < arraysize(st_mm); ++index) { | 320 for (size_t index = 0; index < arraysize(st_mm); ++index) { |
152 SetX87Register(&st_mm[index], kExponentNormal, true, kFractionAllZero); | 321 SetX87OrMMXRegister(&st_mm[index], kExponentNormal, true, kFractionAllZero); |
153 } | 322 } |
154 EXPECT_EQ(0, CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); | 323 EXPECT_EQ(0, CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); |
155 | 324 |
156 // In this set, everything is empty. The registers shouldn’t be consulted at | 325 // In this set, everything is empty. The registers shouldn’t be consulted at |
157 // all, so they’re left alone from the previous set. | 326 // all, so they’re left alone from the previous set. |
158 fsw = 0 << 11; // top = 0: logical 0-7 maps to physical 0-7 | 327 fsw = 0 << 11; // top = 0: logical 0-7 maps to physical 0-7 |
159 fxsave_tag = 0; // everything empty | 328 fxsave_tag = 0; // everything empty |
160 EXPECT_EQ(0xffff, | 329 EXPECT_EQ(0xffff, |
161 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); | 330 CPUContextX86::FxsaveToFsaveTagWord(fsw, fxsave_tag, st_mm)); |
162 } | 331 } |
163 | 332 |
| 333 TEST(CPUContextX86, FsaveToFxsaveTagWord) { |
| 334 // The register sets that these x87 tag words might apply to are given in the |
| 335 // FxsaveToFsaveTagWord test above. |
| 336 EXPECT_EQ(0x0f, CPUContextX86::FsaveToFxsaveTagWord(0xff22)); |
| 337 EXPECT_EQ(0xf0, CPUContextX86::FsaveToFxsaveTagWord(0xa9ff)); |
| 338 EXPECT_EQ(0x5a, CPUContextX86::FsaveToFxsaveTagWord(0xeebb)); |
| 339 EXPECT_EQ(0x1f, CPUContextX86::FsaveToFxsaveTagWord(0xfe90)); |
| 340 EXPECT_EQ(0xff, CPUContextX86::FsaveToFxsaveTagWord(0x0000)); |
| 341 EXPECT_EQ(0x00, CPUContextX86::FsaveToFxsaveTagWord(0xffff)); |
| 342 } |
| 343 |
164 } // namespace | 344 } // namespace |
165 } // namespace test | 345 } // namespace test |
166 } // namespace crashpad | 346 } // namespace crashpad |
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