Index: src/compiler/arm/instruction-selector-arm.cc |
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc |
index 15bd856b5b473b5d4b9f81de77f119f0e7a5ee7c..fb04eb1cf44c929eebdb9899e9a25a1db8a42a44 100644 |
--- a/src/compiler/arm/instruction-selector-arm.cc |
+++ b/src/compiler/arm/instruction-selector-arm.cc |
@@ -2221,6 +2221,45 @@ void InstructionSelector::VisitAtomicExchange(Node* node) { |
Emit(code, 1, outputs, input_count, inputs, 1, temp); |
} |
+void InstructionSelector::VisitAtomicCompareExchange(Node* node) { |
+ ArmOperandGenerator g(this); |
+ Node* base = node->InputAt(0); |
+ Node* index = node->InputAt(1); |
+ Node* old_value = node->InputAt(2); |
+ Node* new_value = node->InputAt(3); |
+ ArchOpcode opcode = kArchNop; |
+ MachineType type = AtomicCompareExchangeRepresentationOf(node->op()); |
+ if (type == MachineType::Int8()) { |
+ opcode = kAtomicCompareExchangeInt8; |
+ } else if (type == MachineType::Uint8()) { |
+ opcode = kAtomicCompareExchangeUint8; |
+ } else if (type == MachineType::Int16()) { |
+ opcode = kAtomicCompareExchangeInt16; |
+ } else if (type == MachineType::Uint16()) { |
+ opcode = kAtomicCompareExchangeUint16; |
+ } else if (type == MachineType::Int32() || type == MachineType::Uint32()) { |
+ opcode = kAtomicCompareExchangeWord32; |
+ } else { |
+ UNREACHABLE(); |
+ return; |
+ } |
+ |
+ AddressingMode addressing_mode = kMode_Offset_RR; |
+ InstructionOperand inputs[4]; |
+ size_t input_count = 0; |
+ inputs[input_count++] = g.UseUniqueRegister(base); |
+ inputs[input_count++] = g.UseUniqueRegister(index); |
+ inputs[input_count++] = g.UseUniqueRegister(old_value); |
+ inputs[input_count++] = g.UseUniqueRegister(new_value); |
+ InstructionOperand outputs[1]; |
+ outputs[0] = g.UseUniqueRegister(node); |
+ InstructionOperand temp[2]; |
+ temp[0] = g.TempRegister(); |
+ temp[1] = g.TempRegister(); |
+ InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); |
+ Emit(code, 1, outputs, input_count, inputs, 2, temp); |
+} |
+ |
#define SIMD_TYPE_LIST(V) \ |
V(Float32x4) \ |
V(Int32x4) \ |