| Index: src/arm/assembler-arm.h
|
| diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h
|
| index 866b1c9024d02ebca6f84fef79ce414aee76515f..09392941715ce7e2f135733fb35bc5437a187e94 100644
|
| --- a/src/arm/assembler-arm.h
|
| +++ b/src/arm/assembler-arm.h
|
| @@ -1364,6 +1364,9 @@ class Assembler : public AssemblerBase {
|
|
|
| // Read/patch instructions
|
| Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); }
|
| + Instr16 thumb16_instr_at(int pos) {
|
| + return *reinterpret_cast<Instr16*>(buffer_ + pos);
|
| + }
|
| void instr_at_put(int pos, Instr instr) {
|
| *reinterpret_cast<Instr*>(buffer_ + pos) = instr;
|
| }
|
| @@ -1531,6 +1534,7 @@ class Assembler : public AssemblerBase {
|
| inline void CheckBuffer();
|
| void GrowBuffer();
|
| inline void emit(Instr x);
|
| + inline void emit16(Instr16 x, bool check_buffer = true);
|
|
|
| // 32-bit immediate values
|
| void move_32_bit_immediate(Condition cond,
|
| @@ -1545,6 +1549,53 @@ class Assembler : public AssemblerBase {
|
| void addrmod4(Instr instr, Register rn, RegList rl);
|
| void addrmod5(Instr instr, CRegister crd, const MemOperand& x);
|
|
|
| + Instr16 thumb16_mode1(ThumbMode1Opcode16 op); // A6.2.1 -> mode1
|
| + Instr16 thumb16_mode2(ThumbMode2Opcode16 op); // A6.2.2 -> mode2
|
| + Instr16 thumb16_mode3(ThumbMode3Opcode16 op); // A6.2.3 -> mode3
|
| +
|
| + // A6.2.4 -> mode4, opA 0101 -> _1
|
| + Instr16 thumb16_mode4_1(ThumbMode4_1Opcode16 opB);
|
| + // A6.2.4 -> mode4, opA 0110 -> _2
|
| + Instr16 thumb16_mode4_2(ThumbMode4_2Opcode16 opB);
|
| + // A6.2.4 -> mode4, opA 0111 -> _3
|
| + Instr16 thumb16_mode4_3(ThumbMode4_3Opcode16 opB);
|
| + // A6.2.4 -> mode4, opA 1000 -> _4
|
| + Instr16 thumb16_mode4_4(ThumbMode4_4Opcode16 opB);
|
| + // A6.2.4 -> mode4, opA 1001 -> _5
|
| + Instr16 thumb16_mode4_5(ThumbMode4_5Opcode16 opB);
|
| +
|
| + Instr16 thumb16_2lowreg_encoding(Register rd,
|
| + const Operand& x);
|
| + Instr16 thumb16_2lowreg_encoding(Register rd,
|
| + Register rs);
|
| + Instr16 thumb16_2lowreg_imm3_encoding(Register rd,
|
| + Register rn,
|
| + const Operand& x);
|
| + Instr16 thumb16_2lowreg_imm5_encoding(Register rd,
|
| + Register rn,
|
| + uint32_t offset);
|
| + Instr16 thumb16_2lowreg_imm5_encoding(Register rd,
|
| + Register rn,
|
| + const Operand& x);
|
| + Instr16 thumb16_3lowreg_encoding(Register rd,
|
| + Register rn,
|
| + const Operand& x);
|
| + Instr16 thumb16_3lowreg_encoding(Register rd,
|
| + const MemOperand& x);
|
| + Instr16 thumb16_anyreg_encoding(const Operand& x);
|
| + Instr16 thumb16_anyreg_encoding(Register rm);
|
| + Instr16 thumb16_2anyreg_encoding(Register rd, const Operand& x);
|
| + Instr16 thumb16_lowreg_imm8_encoding(Register rd, const Operand& x);
|
| + Instr16 thumb16_lowreg_imm8_encoding(Register rd, uint32_t offset);
|
| + static Instr16 thumb16_instr_at(Address addr);
|
| + void thumb16_instr_at_put(int pos, Instr16 instr);
|
| + bool fits_thumb16_mode_4(Register reg, const MemOperand& op);
|
| + bool fits_thumb16_mode_4_1(Register reg, const MemOperand& op);
|
| + bool fits_thumb16_mode_4_5(Register reg, const MemOperand& op);
|
| +
|
| + bool is_low_reg(Register reg);
|
| + bool are_low_reg(Register reg1, Register reg2);
|
| +
|
| // Labels
|
| void print(Label* L);
|
| void bind_to(Label* L, int pos);
|
|
|