[v8-dev] ARM: Improve Lithium register constraints.

src/arm/codegen-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 756 matching lines @@
   ASSERT(!input.is(result));
   ASSERT(!input.is(double_scratch1));
   ASSERT(!input.is(double_scratch2));
   ASSERT(!result.is(double_scratch1));
   ASSERT(!result.is(double_scratch2));
   ASSERT(!double_scratch1.is(double_scratch2));
   ASSERT(!temp1.is(temp2));
   ASSERT(!temp1.is(temp3));
   ASSERT(!temp2.is(temp3));
   ASSERT(ExternalReference::math_exp_constants(0).address() != NULL);
+  // Register input isn't modified. All other registers are clobbered.

[danno, 2013/08/20 14:53:20]

nit: You already have a comment in the header about register usage, and this
one's position doesn't make it necessarily intuitive to update if things change.
I would discard this one and just keep the one in the header.

[vincent.belliard.fr, 2013/08/22 12:35:48]

I will discard it in the next release.

 
   Label done;
 
   __ mov(temp3, Operand(ExternalReference::math_exp_constants(0)));
 
   __ vldr(double_scratch1, ExpConstant(0, temp3));
   __ vmov(result, kDoubleRegZero);
   __ VFPCompareAndSetFlags(double_scratch1, input);
   __ b(ge, &done);
   __ vldr(double_scratch2, ExpConstant(1, temp3));
   __ VFPCompareAndSetFlags(input, double_scratch2);
   __ vldr(result, ExpConstant(2, temp3));
   __ b(ge, &done);
   __ vldr(double_scratch1, ExpConstant(3, temp3));
   __ vldr(result, ExpConstant(4, temp3));
   __ vmul(double_scratch1, double_scratch1, input);
   __ vadd(double_scratch1, double_scratch1, result);
   __ vmov(temp2, temp1, double_scratch1);
   __ vsub(double_scratch1, double_scratch1, result);
   __ vldr(result, ExpConstant(6, temp3));
   __ vldr(double_scratch2, ExpConstant(5, temp3));
   __ vmul(double_scratch1, double_scratch1, double_scratch2);
   __ vsub(double_scratch1, double_scratch1, input);
   __ vsub(result, result, double_scratch1);
-  __ vmul(input, double_scratch1, double_scratch1);
-  __ vmul(result, result, input);
+  __ vmul(double_scratch2, double_scratch1, double_scratch1);
+  __ vmul(result, result, double_scratch2);
   __ mov(temp1, Operand(temp2, LSR, 11));
   __ vldr(double_scratch2, ExpConstant(7, temp3));
   __ vmul(result, result, double_scratch2);
   __ vsub(result, result, double_scratch1);
   __ vldr(double_scratch2, ExpConstant(8, temp3));
   __ vadd(result, result, double_scratch2);
   __ movw(ip, 0x7ff);
   __ and_(temp2, temp2, Operand(ip));
   __ add(temp1, temp1, Operand(0x3ff));
   __ mov(temp1, Operand(temp1, LSL, 20));
 
   // Must not call ExpConstant() after overwriting temp3!
   __ mov(temp3, Operand(ExternalReference::math_exp_log_table()));
   __ ldr(ip, MemOperand(temp3, temp2, LSL, 3));
   __ add(temp3, temp3, Operand(kPointerSize));
   __ ldr(temp2, MemOperand(temp3, temp2, LSL, 3));
   __ orr(temp1, temp1, temp2);
-  __ vmov(input, ip, temp1);
-  __ vmul(result, result, input);
+  __ vmov(double_scratch1, ip, temp1);
+  __ vmul(result, result, double_scratch1);
   __ bind(&done);
 }
 
 #undef __
 
 // add(r0, pc, Operand(-8))
 static const uint32_t kCodeAgePatchFirstInstruction = 0xe24f0008;
 
 static byte* GetNoCodeAgeSequence(uint32_t* length) {
   // The sequence of instructions that is patched out for aging code is the
@@ skipping 52 matching lines @@
     patcher.masm()->add(r0, pc, Operand(-8));
     patcher.masm()->ldr(pc, MemOperand(pc, -4));
     patcher.masm()->dd(reinterpret_cast<uint32_t>(stub->instruction_start()));
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM