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1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_WASM_OPCODES_H_ | 5 #ifndef V8_WASM_OPCODES_H_ |
6 #define V8_WASM_OPCODES_H_ | 6 #define V8_WASM_OPCODES_H_ |
7 | 7 |
8 #include "src/machine-type.h" | 8 #include "src/machine-type.h" |
9 #include "src/signature.h" | 9 #include "src/signature.h" |
10 | 10 |
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266 V(I32AsmjsStoreMem8, 0xdb, i_ii) \ | 266 V(I32AsmjsStoreMem8, 0xdb, i_ii) \ |
267 V(I32AsmjsStoreMem16, 0xdc, i_ii) \ | 267 V(I32AsmjsStoreMem16, 0xdc, i_ii) \ |
268 V(I32AsmjsStoreMem, 0xdd, i_ii) \ | 268 V(I32AsmjsStoreMem, 0xdd, i_ii) \ |
269 V(F32AsmjsStoreMem, 0xde, f_if) \ | 269 V(F32AsmjsStoreMem, 0xde, f_if) \ |
270 V(F64AsmjsStoreMem, 0xdf, d_id) \ | 270 V(F64AsmjsStoreMem, 0xdf, d_id) \ |
271 V(I32AsmjsSConvertF32, 0xe0, i_f) \ | 271 V(I32AsmjsSConvertF32, 0xe0, i_f) \ |
272 V(I32AsmjsUConvertF32, 0xe1, i_f) \ | 272 V(I32AsmjsUConvertF32, 0xe1, i_f) \ |
273 V(I32AsmjsSConvertF64, 0xe2, i_d) \ | 273 V(I32AsmjsSConvertF64, 0xe2, i_d) \ |
274 V(I32AsmjsUConvertF64, 0xe3, i_d) | 274 V(I32AsmjsUConvertF64, 0xe3, i_d) |
275 | 275 |
276 #define FOREACH_SIMD_OPCODE(V) \ | 276 #define FOREACH_SIMD_0_OPERAND_OPCODE(V) \ |
277 V(F32x4Splat, 0xe500, s_f) \ | 277 V(F32x4Splat, 0xe500, s_f) \ |
278 V(F32x4ExtractLane, 0xe501, f_si) \ | 278 V(F32x4ReplaceLane, 0xe502, s_sif) \ |
279 V(F32x4ReplaceLane, 0xe502, s_sif) \ | 279 V(F32x4Abs, 0xe503, s_s) \ |
280 V(F32x4Abs, 0xe503, s_s) \ | 280 V(F32x4Neg, 0xe504, s_s) \ |
281 V(F32x4Neg, 0xe504, s_s) \ | 281 V(F32x4Sqrt, 0xe505, s_s) \ |
282 V(F32x4Sqrt, 0xe505, s_s) \ | 282 V(F32x4RecipApprox, 0xe506, s_s) \ |
283 V(F32x4RecipApprox, 0xe506, s_s) \ | 283 V(F32x4SqrtApprox, 0xe507, s_s) \ |
284 V(F32x4SqrtApprox, 0xe507, s_s) \ | 284 V(F32x4Add, 0xe508, s_ss) \ |
285 V(F32x4Add, 0xe508, s_ss) \ | 285 V(F32x4Sub, 0xe509, s_ss) \ |
286 V(F32x4Sub, 0xe509, s_ss) \ | 286 V(F32x4Mul, 0xe50a, s_ss) \ |
287 V(F32x4Mul, 0xe50a, s_ss) \ | 287 V(F32x4Div, 0xe50b, s_ss) \ |
288 V(F32x4Div, 0xe50b, s_ss) \ | 288 V(F32x4Min, 0xe50c, s_ss) \ |
289 V(F32x4Min, 0xe50c, s_ss) \ | 289 V(F32x4Max, 0xe50d, s_ss) \ |
290 V(F32x4Max, 0xe50d, s_ss) \ | 290 V(F32x4MinNum, 0xe50e, s_ss) \ |
291 V(F32x4MinNum, 0xe50e, s_ss) \ | 291 V(F32x4MaxNum, 0xe50f, s_ss) \ |
292 V(F32x4MaxNum, 0xe50f, s_ss) \ | 292 V(F32x4Eq, 0xe510, s_ss) \ |
293 V(F32x4Eq, 0xe510, s_ss) \ | 293 V(F32x4Ne, 0xe511, s_ss) \ |
294 V(F32x4Ne, 0xe511, s_ss) \ | 294 V(F32x4Lt, 0xe512, s_ss) \ |
295 V(F32x4Lt, 0xe512, s_ss) \ | 295 V(F32x4Le, 0xe513, s_ss) \ |
296 V(F32x4Le, 0xe513, s_ss) \ | 296 V(F32x4Gt, 0xe514, s_ss) \ |
297 V(F32x4Gt, 0xe514, s_ss) \ | 297 V(F32x4Ge, 0xe515, s_ss) \ |
298 V(F32x4Ge, 0xe515, s_ss) \ | 298 V(F32x4Select, 0xe516, s_sss) \ |
299 V(F32x4Select, 0xe516, s_sss) \ | 299 V(F32x4Swizzle, 0xe517, s_s) \ |
300 V(F32x4Swizzle, 0xe517, s_s) \ | 300 V(F32x4Shuffle, 0xe518, s_ss) \ |
301 V(F32x4Shuffle, 0xe518, s_ss) \ | 301 V(F32x4FromInt32x4, 0xe519, s_s) \ |
302 V(F32x4FromInt32x4, 0xe519, s_s) \ | 302 V(F32x4FromUint32x4, 0xe51a, s_s) \ |
303 V(F32x4FromUint32x4, 0xe51a, s_s) \ | 303 V(I32x4Splat, 0xe51b, s_i) \ |
304 V(I32x4Splat, 0xe51b, s_i) \ | 304 V(I32x4ReplaceLane, 0xe51d, s_sii) \ |
305 V(I32x4ExtractLane, 0xe51c, i_si) \ | 305 V(I32x4Neg, 0xe51e, s_s) \ |
306 V(I32x4ReplaceLane, 0xe51d, s_sii) \ | 306 V(I32x4Add, 0xe51f, s_ss) \ |
307 V(I32x4Neg, 0xe51e, s_s) \ | 307 V(I32x4Sub, 0xe520, s_ss) \ |
308 V(I32x4Add, 0xe51f, s_ss) \ | 308 V(I32x4Mul, 0xe521, s_ss) \ |
309 V(I32x4Sub, 0xe520, s_ss) \ | 309 V(I32x4Min_s, 0xe522, s_ss) \ |
310 V(I32x4Mul, 0xe521, s_ss) \ | 310 V(I32x4Max_s, 0xe523, s_ss) \ |
311 V(I32x4Min_s, 0xe522, s_ss) \ | 311 V(I32x4Shl, 0xe524, s_si) \ |
312 V(I32x4Max_s, 0xe523, s_ss) \ | 312 V(I32x4Shr_s, 0xe525, s_si) \ |
313 V(I32x4Shl, 0xe524, s_si) \ | 313 V(I32x4Eq, 0xe526, s_ss) \ |
314 V(I32x4Shr_s, 0xe525, s_si) \ | 314 V(I32x4Ne, 0xe527, s_ss) \ |
315 V(I32x4Eq, 0xe526, s_ss) \ | 315 V(I32x4Lt_s, 0xe528, s_ss) \ |
316 V(I32x4Ne, 0xe527, s_ss) \ | 316 V(I32x4Le_s, 0xe529, s_ss) \ |
317 V(I32x4Lt_s, 0xe528, s_ss) \ | 317 V(I32x4Gt_s, 0xe52a, s_ss) \ |
318 V(I32x4Le_s, 0xe529, s_ss) \ | 318 V(I32x4Ge_s, 0xe52b, s_ss) \ |
319 V(I32x4Gt_s, 0xe52a, s_ss) \ | 319 V(I32x4Select, 0xe52c, s_sss) \ |
320 V(I32x4Ge_s, 0xe52b, s_ss) \ | 320 V(I32x4Swizzle, 0xe52d, s_s) \ |
321 V(I32x4Select, 0xe52c, s_sss) \ | 321 V(I32x4Shuffle, 0xe52e, s_ss) \ |
322 V(I32x4Swizzle, 0xe52d, s_s) \ | 322 V(I32x4FromFloat32x4, 0xe52f, s_s) \ |
323 V(I32x4Shuffle, 0xe52e, s_ss) \ | 323 V(I32x4Min_u, 0xe530, s_ss) \ |
324 V(I32x4FromFloat32x4, 0xe52f, s_s) \ | 324 V(I32x4Max_u, 0xe531, s_ss) \ |
325 V(I32x4Min_u, 0xe530, s_ss) \ | 325 V(I32x4Shr_u, 0xe532, s_ss) \ |
326 V(I32x4Max_u, 0xe531, s_ss) \ | 326 V(I32x4Lt_u, 0xe533, s_ss) \ |
327 V(I32x4Shr_u, 0xe532, s_ss) \ | 327 V(I32x4Le_u, 0xe534, s_ss) \ |
328 V(I32x4Lt_u, 0xe533, s_ss) \ | 328 V(I32x4Gt_u, 0xe535, s_ss) \ |
329 V(I32x4Le_u, 0xe534, s_ss) \ | 329 V(I32x4Ge_u, 0xe536, s_ss) \ |
330 V(I32x4Gt_u, 0xe535, s_ss) \ | 330 V(Ui32x4FromFloat32x4, 0xe537, s_s) \ |
331 V(I32x4Ge_u, 0xe536, s_ss) \ | 331 V(I16x8Splat, 0xe538, s_i) \ |
332 V(Ui32x4FromFloat32x4, 0xe537, s_s) \ | 332 V(I16x8ReplaceLane, 0xe53a, s_sii) \ |
333 V(I16x8Splat, 0xe538, s_i) \ | 333 V(I16x8Neg, 0xe53b, s_s) \ |
334 V(I16x8ExtractLane, 0xe539, i_si) \ | 334 V(I16x8Add, 0xe53c, s_ss) \ |
335 V(I16x8ReplaceLane, 0xe53a, s_sii) \ | 335 V(I16x8AddSaturate_s, 0xe53d, s_ss) \ |
336 V(I16x8Neg, 0xe53b, s_s) \ | 336 V(I16x8Sub, 0xe53e, s_ss) \ |
337 V(I16x8Add, 0xe53c, s_ss) \ | 337 V(I16x8SubSaturate_s, 0xe53f, s_ss) \ |
338 V(I16x8AddSaturate_s, 0xe53d, s_ss) \ | 338 V(I16x8Mul, 0xe540, s_ss) \ |
339 V(I16x8Sub, 0xe53e, s_ss) \ | 339 V(I16x8Min_s, 0xe541, s_ss) \ |
340 V(I16x8SubSaturate_s, 0xe53f, s_ss) \ | 340 V(I16x8Max_s, 0xe542, s_ss) \ |
341 V(I16x8Mul, 0xe540, s_ss) \ | 341 V(I16x8Shl, 0xe543, s_si) \ |
342 V(I16x8Min_s, 0xe541, s_ss) \ | 342 V(I16x8Shr_s, 0xe544, s_si) \ |
343 V(I16x8Max_s, 0xe542, s_ss) \ | 343 V(I16x8Eq, 0xe545, s_ss) \ |
344 V(I16x8Shl, 0xe543, s_si) \ | 344 V(I16x8Ne, 0xe546, s_ss) \ |
345 V(I16x8Shr_s, 0xe544, s_si) \ | 345 V(I16x8Lt_s, 0xe547, s_ss) \ |
346 V(I16x8Eq, 0xe545, s_ss) \ | 346 V(I16x8Le_s, 0xe548, s_ss) \ |
347 V(I16x8Ne, 0xe546, s_ss) \ | 347 V(I16x8Gt_s, 0xe549, s_ss) \ |
348 V(I16x8Lt_s, 0xe547, s_ss) \ | 348 V(I16x8Ge_s, 0xe54a, s_ss) \ |
349 V(I16x8Le_s, 0xe548, s_ss) \ | 349 V(I16x8Select, 0xe54b, s_sss) \ |
350 V(I16x8Gt_s, 0xe549, s_ss) \ | 350 V(I16x8Swizzle, 0xe54c, s_s) \ |
351 V(I16x8Ge_s, 0xe54a, s_ss) \ | 351 V(I16x8Shuffle, 0xe54d, s_ss) \ |
352 V(I16x8Select, 0xe54b, s_sss) \ | 352 V(I16x8AddSaturate_u, 0xe54e, s_ss) \ |
353 V(I16x8Swizzle, 0xe54c, s_s) \ | 353 V(I16x8SubSaturate_u, 0xe54f, s_ss) \ |
354 V(I16x8Shuffle, 0xe54d, s_ss) \ | 354 V(I16x8Min_u, 0xe550, s_ss) \ |
355 V(I16x8AddSaturate_u, 0xe54e, s_ss) \ | 355 V(I16x8Max_u, 0xe551, s_ss) \ |
356 V(I16x8SubSaturate_u, 0xe54f, s_ss) \ | 356 V(I16x8Shr_u, 0xe552, s_si) \ |
357 V(I16x8Min_u, 0xe550, s_ss) \ | 357 V(I16x8Lt_u, 0xe553, s_ss) \ |
358 V(I16x8Max_u, 0xe551, s_ss) \ | 358 V(I16x8Le_u, 0xe554, s_ss) \ |
359 V(I16x8Shr_u, 0xe552, s_si) \ | 359 V(I16x8Gt_u, 0xe555, s_ss) \ |
360 V(I16x8Lt_u, 0xe553, s_ss) \ | 360 V(I16x8Ge_u, 0xe556, s_ss) \ |
361 V(I16x8Le_u, 0xe554, s_ss) \ | 361 V(I8x16Splat, 0xe557, s_i) \ |
362 V(I16x8Gt_u, 0xe555, s_ss) \ | 362 V(I8x16ReplaceLane, 0xe559, s_sii) \ |
363 V(I16x8Ge_u, 0xe556, s_ss) \ | 363 V(I8x16Neg, 0xe55a, s_s) \ |
364 V(I8x16Splat, 0xe557, s_i) \ | 364 V(I8x16Add, 0xe55b, s_ss) \ |
365 V(I8x16ExtractLane, 0xe558, i_si) \ | 365 V(I8x16AddSaturate_s, 0xe55c, s_ss) \ |
366 V(I8x16ReplaceLane, 0xe559, s_sii) \ | 366 V(I8x16Sub, 0xe55d, s_ss) \ |
367 V(I8x16Neg, 0xe55a, s_s) \ | 367 V(I8x16SubSaturate_s, 0xe55e, s_ss) \ |
368 V(I8x16Add, 0xe55b, s_ss) \ | 368 V(I8x16Mul, 0xe55f, s_ss) \ |
369 V(I8x16AddSaturate_s, 0xe55c, s_ss) \ | 369 V(I8x16Min_s, 0xe560, s_ss) \ |
370 V(I8x16Sub, 0xe55d, s_ss) \ | 370 V(I8x16Max_s, 0xe561, s_ss) \ |
371 V(I8x16SubSaturate_s, 0xe55e, s_ss) \ | 371 V(I8x16Shl, 0xe562, s_si) \ |
372 V(I8x16Mul, 0xe55f, s_ss) \ | 372 V(I8x16Shr_s, 0xe563, s_si) \ |
373 V(I8x16Min_s, 0xe560, s_ss) \ | 373 V(I8x16Eq, 0xe564, s_ss) \ |
374 V(I8x16Max_s, 0xe561, s_ss) \ | 374 V(I8x16Neq, 0xe565, s_ss) \ |
375 V(I8x16Shl, 0xe562, s_si) \ | 375 V(I8x16Lt_s, 0xe566, s_ss) \ |
376 V(I8x16Shr_s, 0xe563, s_si) \ | 376 V(I8x16Le_s, 0xe567, s_ss) \ |
377 V(I8x16Eq, 0xe564, s_ss) \ | 377 V(I8x16Gt_s, 0xe568, s_ss) \ |
378 V(I8x16Neq, 0xe565, s_ss) \ | 378 V(I8x16Ge_s, 0xe569, s_ss) \ |
379 V(I8x16Lt_s, 0xe566, s_ss) \ | 379 V(I8x16Select, 0xe56a, s_sss) \ |
380 V(I8x16Le_s, 0xe567, s_ss) \ | 380 V(I8x16Swizzle, 0xe56b, s_s) \ |
381 V(I8x16Gt_s, 0xe568, s_ss) \ | 381 V(I8x16Shuffle, 0xe56c, s_ss) \ |
382 V(I8x16Ge_s, 0xe569, s_ss) \ | 382 V(I8x16AddSaturate_u, 0xe56d, s_ss) \ |
383 V(I8x16Select, 0xe56a, s_sss) \ | 383 V(I8x16Sub_saturate_u, 0xe56e, s_ss) \ |
384 V(I8x16Swizzle, 0xe56b, s_s) \ | 384 V(I8x16Min_u, 0xe56f, s_ss) \ |
385 V(I8x16Shuffle, 0xe56c, s_ss) \ | 385 V(I8x16Max_u, 0xe570, s_ss) \ |
386 V(I8x16AddSaturate_u, 0xe56d, s_ss) \ | 386 V(I8x16Shr_u, 0xe571, s_ss) \ |
387 V(I8x16Sub_saturate_u, 0xe56e, s_ss) \ | 387 V(I8x16Lt_u, 0xe572, s_ss) \ |
388 V(I8x16Min_u, 0xe56f, s_ss) \ | 388 V(I8x16Le_u, 0xe573, s_ss) \ |
389 V(I8x16Max_u, 0xe570, s_ss) \ | 389 V(I8x16Gt_u, 0xe574, s_ss) \ |
390 V(I8x16Shr_u, 0xe571, s_ss) \ | 390 V(I8x16Ge_u, 0xe575, s_ss) \ |
391 V(I8x16Lt_u, 0xe572, s_ss) \ | 391 V(S128And, 0xe576, s_ss) \ |
392 V(I8x16Le_u, 0xe573, s_ss) \ | 392 V(S128Ior, 0xe577, s_ss) \ |
393 V(I8x16Gt_u, 0xe574, s_ss) \ | 393 V(S128Xor, 0xe578, s_ss) \ |
394 V(I8x16Ge_u, 0xe575, s_ss) \ | |
395 V(S128And, 0xe576, s_ss) \ | |
396 V(S128Ior, 0xe577, s_ss) \ | |
397 V(S128Xor, 0xe578, s_ss) \ | |
398 V(S128Not, 0xe579, s_s) | 394 V(S128Not, 0xe579, s_s) |
399 | 395 |
| 396 #define FOREACH_SIMD_1_OPERAND_OPCODE(V) \ |
| 397 V(F32x4ExtractLane, 0xe501, _) \ |
| 398 V(I32x4ExtractLane, 0xe51c, _) \ |
| 399 V(I16x8ExtractLane, 0xe539, _) \ |
| 400 V(I8x16ExtractLane, 0xe558, _) |
| 401 |
400 // All opcodes. | 402 // All opcodes. |
401 #define FOREACH_OPCODE(V) \ | 403 #define FOREACH_OPCODE(V) \ |
402 FOREACH_CONTROL_OPCODE(V) \ | 404 FOREACH_CONTROL_OPCODE(V) \ |
403 FOREACH_MISC_OPCODE(V) \ | 405 FOREACH_MISC_OPCODE(V) \ |
404 FOREACH_SIMPLE_OPCODE(V) \ | 406 FOREACH_SIMPLE_OPCODE(V) \ |
405 FOREACH_SIMPLE_MEM_OPCODE(V) \ | 407 FOREACH_SIMPLE_MEM_OPCODE(V) \ |
406 FOREACH_STORE_MEM_OPCODE(V) \ | 408 FOREACH_STORE_MEM_OPCODE(V) \ |
407 FOREACH_LOAD_MEM_OPCODE(V) \ | 409 FOREACH_LOAD_MEM_OPCODE(V) \ |
408 FOREACH_MISC_MEM_OPCODE(V) \ | 410 FOREACH_MISC_MEM_OPCODE(V) \ |
409 FOREACH_ASMJS_COMPAT_OPCODE(V) \ | 411 FOREACH_ASMJS_COMPAT_OPCODE(V) \ |
410 FOREACH_SIMD_OPCODE(V) | 412 FOREACH_SIMD_0_OPERAND_OPCODE(V) \ |
| 413 FOREACH_SIMD_1_OPERAND_OPCODE(V) |
411 | 414 |
412 // All signatures. | 415 // All signatures. |
413 #define FOREACH_SIGNATURE(V) \ | 416 #define FOREACH_SIGNATURE(V) \ |
414 FOREACH_SIMD_SIGNATURE(V) \ | 417 FOREACH_SIMD_SIGNATURE(V) \ |
415 V(i_ii, kAstI32, kAstI32, kAstI32) \ | 418 V(i_ii, kAstI32, kAstI32, kAstI32) \ |
416 V(i_i, kAstI32, kAstI32) \ | 419 V(i_i, kAstI32, kAstI32) \ |
417 V(i_v, kAstI32) \ | 420 V(i_v, kAstI32) \ |
418 V(i_ff, kAstI32, kAstF32, kAstF32) \ | 421 V(i_ff, kAstI32, kAstF32, kAstF32) \ |
419 V(i_f, kAstI32, kAstF32) \ | 422 V(i_f, kAstI32, kAstF32) \ |
420 V(i_dd, kAstI32, kAstF64, kAstF64) \ | 423 V(i_dd, kAstI32, kAstF64, kAstF64) \ |
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436 V(d_f, kAstF64, kAstF32) \ | 439 V(d_f, kAstF64, kAstF32) \ |
437 V(d_i, kAstF64, kAstI32) \ | 440 V(d_i, kAstF64, kAstI32) \ |
438 V(d_l, kAstF64, kAstI64) \ | 441 V(d_l, kAstF64, kAstI64) \ |
439 V(d_id, kAstF64, kAstI32, kAstF64) \ | 442 V(d_id, kAstF64, kAstI32, kAstF64) \ |
440 V(f_if, kAstF32, kAstI32, kAstF32) \ | 443 V(f_if, kAstF32, kAstI32, kAstF32) \ |
441 V(l_il, kAstI64, kAstI32, kAstI64) | 444 V(l_il, kAstI64, kAstI32, kAstI64) |
442 | 445 |
443 #define FOREACH_SIMD_SIGNATURE(V) \ | 446 #define FOREACH_SIMD_SIGNATURE(V) \ |
444 V(s_s, kAstS128, kAstS128) \ | 447 V(s_s, kAstS128, kAstS128) \ |
445 V(s_f, kAstS128, kAstF32) \ | 448 V(s_f, kAstS128, kAstF32) \ |
446 V(f_si, kAstF32, kAstS128, kAstI32) \ | |
447 V(s_sif, kAstS128, kAstS128, kAstI32, kAstF32) \ | 449 V(s_sif, kAstS128, kAstS128, kAstI32, kAstF32) \ |
448 V(s_ss, kAstS128, kAstS128, kAstS128) \ | 450 V(s_ss, kAstS128, kAstS128, kAstS128) \ |
449 V(s_sss, kAstS128, kAstS128, kAstS128, kAstS128) \ | 451 V(s_sss, kAstS128, kAstS128, kAstS128, kAstS128) \ |
450 V(s_i, kAstS128, kAstI32) \ | 452 V(s_i, kAstS128, kAstI32) \ |
451 V(i_si, kAstI32, kAstS128, kAstI32) \ | |
452 V(s_sii, kAstS128, kAstS128, kAstI32, kAstI32) \ | 453 V(s_sii, kAstS128, kAstS128, kAstI32, kAstI32) \ |
453 V(s_si, kAstS128, kAstS128, kAstI32) | 454 V(s_si, kAstS128, kAstS128, kAstI32) |
454 | 455 |
455 #define FOREACH_PREFIX(V) V(Simd, 0xe5) | 456 #define FOREACH_PREFIX(V) V(Simd, 0xe5) |
456 | 457 |
457 enum WasmOpcode { | 458 enum WasmOpcode { |
458 // Declare expression opcodes. | 459 // Declare expression opcodes. |
459 #define DECLARE_NAMED_ENUM(name, opcode, sig) kExpr##name = opcode, | 460 #define DECLARE_NAMED_ENUM(name, opcode, sig) kExpr##name = opcode, |
460 FOREACH_OPCODE(DECLARE_NAMED_ENUM) | 461 FOREACH_OPCODE(DECLARE_NAMED_ENUM) |
461 #undef DECLARE_NAMED_ENUM | 462 #undef DECLARE_NAMED_ENUM |
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635 default: | 636 default: |
636 return "<unknown>"; | 637 return "<unknown>"; |
637 } | 638 } |
638 } | 639 } |
639 }; | 640 }; |
640 } // namespace wasm | 641 } // namespace wasm |
641 } // namespace internal | 642 } // namespace internal |
642 } // namespace v8 | 643 } // namespace v8 |
643 | 644 |
644 #endif // V8_WASM_OPCODES_H_ | 645 #endif // V8_WASM_OPCODES_H_ |
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