Fix SHL when shift amount is zero for arm and mips.

src/mips/lithium-codegen-mips.cc

Index: src/mips/lithium-codegen-mips.cc
diff --git a/src/mips/lithium-codegen-mips.cc b/src/mips/lithium-codegen-mips.cc
index 85528f0ab24de850dbbf1628fecff02b43b47f0e..d7d12411d40c8b5ece5423709696a674c7ea67fc 100644
--- a/src/mips/lithium-codegen-mips.cc
+++ b/src/mips/lithium-codegen-mips.cc
@@ -1585,8 +1585,10 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
               instr->can_deopt()) {
             if (shift_count != 1) {
               __ sll(result, left, shift_count - 1);
+              __ SmiTagCheckOverflow(result, result, scratch);
+            } else {
+              __ SmiTagCheckOverflow(result, left, scratch);
             }
-            __ SmiTagCheckOverflow(result, result, scratch);
             DeoptimizeIf(lt, instr->environment(), scratch, Operand(zero_reg));
           } else {
             __ sll(result, left, shift_count);