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1 # Test rel32 jump instructions with abs32 and .reloc obstructions. | 1 # Test rel32 jump instructions with abs32 and .reloc obstructions. |
2 | 2 |
| 3 # Processor type |
| 4 x64 |
3 # .text start RVA and end RVA | 5 # .text start RVA and end RVA |
4 1000 | 6 1000 |
5 3000 | 7 3000 |
6 # .reloc start RVA and end RVA | 8 # .reloc start RVA and end RVA |
7 # Typically this won't overlap with .text. | 9 # Typically this won't overlap with .text. |
8 # Note: If we use 1020, then the algorithm would never encounter it, so the | 10 # Note: If we use 1020, then the algorithm would never encounter it, so the |
9 # .reloc does not get skipped! This edge case is not worth fixing right now. | 11 # .reloc does not get skipped! This edge case is not worth fixing right now. |
10 101F | 12 101F |
11 1030 | 13 1030 |
12 # End RVA | 14 # End RVA |
(...skipping 14 matching lines...) Expand all Loading... |
27 00401031: 0F 86 00 00 00 00 jbe 00401037 | 29 00401031: 0F 86 00 00 00 00 jbe 00401037 |
28 00401037: 0F 87 00 00 00 00 ja 0040103D | 30 00401037: 0F 87 00 00 00 00 ja 0040103D |
29 0040103D: 0F 88 00 00 00 00 js 00401043 | 31 0040103D: 0F 88 00 00 00 00 js 00401043 |
30 00401043: 0F 89 00 00 00 00 jns 00401049 | 32 00401043: 0F 89 00 00 00 00 jns 00401049 |
31 00401049: 0F 8A 00 00 00 00 jp 0040104F # Ignored! | 33 00401049: 0F 8A 00 00 00 00 jp 0040104F # Ignored! |
32 0040104F: 0F 8B 00 00 00 00 jnp 00401055 # Ignored! | 34 0040104F: 0F 8B 00 00 00 00 jnp 00401055 # Ignored! |
33 00401055: 0F 8C 00 00 00 00 jl 0040105B # Overlaps with abs32 | 35 00401055: 0F 8C 00 00 00 00 jl 0040105B # Overlaps with abs32 |
34 0040105B: 0F 8D 00 00 00 00 jge 00401061 # Overlaps with abs32 | 36 0040105B: 0F 8D 00 00 00 00 jge 00401061 # Overlaps with abs32 |
35 00401061: 0F 8E 00 00 00 00 jle 00401067 | 37 00401061: 0F 8E 00 00 00 00 jle 00401067 |
36 00401067: 0F 8F 00 00 00 00 jg 0040106D | 38 00401067: 0F 8F 00 00 00 00 jg 0040106D |
37 0040106D: 5D pop ebp | 39 0040106D: FF 15 00 00 00 00 call [rip+00000000] |
38 0040106E: C3 ret | 40 00401073: FF 25 00 00 00 00 jmp [rip+00000000] |
| 41 00401079: 8B 05 00 00 00 00 mov eax,[rip+00000000] |
| 42 0040107F: 8B 3D 00 00 00 00 mov edi,[rip+00000000] |
| 43 00401085: 8D 05 00 00 00 00 lea eax,[rip+00000000] |
| 44 0040108B: 8D 3D 00 00 00 00 lea edi,[rip+00000000] |
| 45 00401091: 48 8B 05 00 00 00 mov rax,[rip+00000000] |
| 46 00 |
| 47 00401098: 48 8B 3D 00 00 00 mov rdi,[rip+00000000] |
| 48 00 |
| 49 0040109F: 48 8D 05 00 00 00 lea rax,[rip+00000000] |
| 50 00 |
| 51 004010A6: 48 8D 3D 00 00 00 lea rdi,[rip+00000000] |
| 52 00 |
| 53 004010AD: 4C 8B 05 00 00 00 mov r8,[rip+00000000] |
| 54 00 |
| 55 004010B4: 4C 8B 3D 00 00 00 mov r15,[rip+00000000] |
| 56 00 |
| 57 004010BB: 4C 8D 05 00 00 00 lea r8,[rip+00000000] |
| 58 00 |
| 59 004010C2: 4C 8D 3D 00 00 00 lea r15,[rip+00000000] |
| 60 00 |
| 61 004010C9: 5D pop ebp |
| 62 004010CA: C3 ret |
39 | 63 |
40 Abs32: | 64 Abs32: |
41 1004 | 65 1004 |
42 1008 | 66 1008 |
43 105A # Straddles across two instruction. | 67 105A # Straddles across two instructions. |
44 105F # Same, but covers the op code (and not the target) of the second. | 68 105F # Same, but covers the op code (and not the target) of the second. |
| 69 10B3 # Straddles across two instructions. |
| 70 10BA # Same, but covers the op code (and not the target) of the second. |
45 | 71 |
46 Expected: | 72 Expected: |
47 # 1004 | 73 # 1004 |
48 # 1009 | 74 # 1009 |
49 100F | 75 100F |
50 1015 | 76 1015 |
51 101B | 77 101B |
52 # 1021 | 78 # 1021 |
53 # 1027 | 79 # 1027 |
54 # 102D | 80 # 102D |
55 1033 | 81 1033 |
56 1039 | 82 1039 |
57 103F | 83 103F |
58 1045 | 84 1045 |
59 # 1057 | 85 # 1057 |
60 # 105D | 86 # 105D |
61 1063 # Op code 0F 8E overlaps with abs32 105F, but still okay | 87 1063 |
62 1069 | 88 1069 |
| 89 106F |
| 90 1075 |
| 91 # 107B Not yet detected. |
| 92 # 1081 Not yet detected. |
| 93 # 1087 Not yet detected. |
| 94 # 108D Not yet detected. |
| 95 1094 |
| 96 109B |
| 97 10A2 |
| 98 10A9 |
| 99 # 10B0 |
| 100 # 10B7 |
| 101 10BE |
| 102 10C5 |
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