Adding Smi support to Add, Sub, Mul, and Bitwise

src/ia32/lithium-gap-resolver-ia32.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 288 matching lines @@
       Register tmp = EnsureTempRegister();
       Operand dst = cgen_->ToOperand(destination);
       __ mov(tmp, src);
       __ mov(dst, tmp);
     }
 
   } else if (source->IsConstantOperand()) {
     LConstantOperand* constant_source = LConstantOperand::cast(source);
     if (destination->IsRegister()) {
       Register dst = cgen_->ToRegister(destination);
-      if (cgen_->IsSmi(constant_source)) {
-        __ Set(dst, cgen_->ToSmiImmediate(constant_source));
-      } else if (cgen_->IsInteger32(constant_source)) {
-        __ Set(dst, cgen_->ToInteger32Immediate(constant_source));
+      Representation r = cgen_->IsSmi(constant_source)
+          ? Representation::Smi() : Representation::Integer32();
+      if (cgen_->IsInteger32(constant_source)) {
+        __ Set(dst, cgen_->ToImmediate(constant_source, r));
       } else {
         __ LoadObject(dst, cgen_->ToHandle(constant_source));
       }
     } else if (destination->IsDoubleRegister()) {
       double v = cgen_->ToDouble(constant_source);
       uint64_t int_val = BitCast<uint64_t, double>(v);
       int32_t lower = static_cast<int32_t>(int_val);
       int32_t upper = static_cast<int32_t>(int_val >> kBitsPerInt);
       if (CpuFeatures::IsSupported(SSE2)) {
         CpuFeatureScope scope(cgen_->masm(), SSE2);
         XMMRegister dst = cgen_->ToDoubleRegister(destination);
         if (int_val == 0) {
           __ xorps(dst, dst);
         } else {
           __ push(Immediate(upper));
           __ push(Immediate(lower));
           __ movdbl(dst, Operand(esp, 0));
           __ add(esp, Immediate(kDoubleSize));
         }
       } else {
         __ push(Immediate(upper));
         __ push(Immediate(lower));
         X87Register dst = cgen_->ToX87Register(destination);
         cgen_->X87Mov(dst, MemOperand(esp, 0));
         __ add(esp, Immediate(kDoubleSize));
       }
     } else {
       ASSERT(destination->IsStackSlot());
       Operand dst = cgen_->ToOperand(destination);
-      if (cgen_->IsSmi(constant_source)) {
-        __ Set(dst, cgen_->ToSmiImmediate(constant_source));
-      } else if (cgen_->IsInteger32(constant_source)) {
-        __ Set(dst, cgen_->ToInteger32Immediate(constant_source));
+      Representation r = cgen_->IsSmi(constant_source)
+          ? Representation::Smi() : Representation::Integer32();
+      if (cgen_->IsInteger32(constant_source)) {
+        __ Set(dst, cgen_->ToImmediate(constant_source, r));
       } else {
         Register tmp = EnsureTempRegister();
         __ LoadObject(tmp, cgen_->ToHandle(constant_source));
         __ mov(dst, tmp);
       }
     }
 
   } else if (source->IsDoubleRegister()) {
     if (CpuFeatures::IsSupported(SSE2)) {
       CpuFeatureScope scope(cgen_->masm(), SSE2);
@@ skipping 184 matching lines @@
   } else if (destination->IsRegister()) {
     source_uses_[destination->index()] = CountSourceUses(destination);
   }
 }
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_IA32