[MIPS] Make validator allow only two load patterns via $t8

src/trusted/validator_mips/inst_classes.h

 /*
  * Copyright (c) 2012 The Native Client Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
 
 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_MIPS_INST_CLASSES_H
 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_MIPS_INST_CLASSES_H
 
 #include <stdint.h>
@@ skipping 118 matching lines @@
   }
 
   /*
    * For load and store instructions.
    */
   virtual bool IsLoadStore() const {
     return false;
   }
 
   /*
+   * For lw instruction.
+   */
+  virtual bool IsLoadWord() const {
+    return false;
+  }
+
+  /*
    * For direct jumps, returning the destination address.
    */
   virtual uint32_t DestAddr(const Instruction instr, uint32_t addr) const {
     UNREFERENCED_PARAMETER(instr);
     UNREFERENCED_PARAMETER(addr);
     return 0;
   }
 
   /*
    * Used by jump register instructions; returns the register that holds the
@@ skipping 15 matching lines @@
 
  protected:
   ClassDecoder() {}
   virtual ~ClassDecoder() {}
 };
 
 /*
  * Current MIPS NaCl halt (break).
  */
 class NaClHalt : public ClassDecoder {
-  public:
-    virtual ~NaClHalt() {}
-    virtual SafetyLevel safety(const Instruction instr) const {
-      UNREFERENCED_PARAMETER(instr);
-      return MAY_BE_SAFE;
-    }
+ public:
+  virtual ~NaClHalt() {}
+  virtual SafetyLevel safety(const Instruction instr) const {
+    UNREFERENCED_PARAMETER(instr);
+    return MAY_BE_SAFE;
+  }
 };
 
 /*
  * Represents an instruction that is forbidden under all circumstances, so we
  * didn't bother decoding it further.
  */
 class Forbidden : public ClassDecoder {
  public:
   virtual ~Forbidden() {}
   virtual SafetyLevel safety(const Instruction instr) const {
@@ skipping 91 matching lines @@
     return true;
   }
   virtual ~AbstractLoadStore() {}
   virtual SafetyLevel safety(const Instruction instr) const {
     UNREFERENCED_PARAMETER(instr);
     return MAY_BE_SAFE;
   }
   virtual Register BaseAddressRegister(const Instruction instr) const {
     return instr.Reg(25, 21);
   }
+  virtual uint32_t GetImm(const Instruction instr) const {
+    return instr.Bits(15, 0);
+  }
 };
 
 /*
  * Store instructions.
  */
 class Store : public AbstractLoadStore {
  public:
   virtual ~Store() {}
 };
 
 /*
  * Load instructions, which alter the destination register.
  */
 class Load : public AbstractLoadStore {
  public:
   virtual ~Load() {}
   virtual Register DestGprReg(const Instruction instr) const {
     return instr.Reg(20, 16);
   }
 };
 
 /*
+ * Load word instruction, for loading thread pointer.
+ */
+class LoadWord : public Load {
+ public:
+  virtual ~LoadWord() {}
+  virtual bool IsLoadWord() const {
+    return true;
+  }
+};
+
+  /*
  * Floating point load and store instructions.
  */
 class FPLoadStore : public AbstractLoadStore {
  public:
   virtual ~FPLoadStore() {}
 };
 
 /*
  * Store Conditional class, containing the sc instruction,
  * which might alter the contents of the register which is the 1st operand.
@@ skipping 102 matching lines @@
  * Unknown instructions, treated as forbidden.
  */
 class Unrecognized : public ClassDecoder {
  public:
   virtual ~Unrecognized() {}
   virtual SafetyLevel safety(const Instruction instr) const {
     UNREFERENCED_PARAMETER(instr);
     return FORBIDDEN;
   }
 };
-}  // namespace
+}  // namespace nacl_mips_dec
 
 #endif  // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_MIPS_INST_CLASSES_H