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Side by Side Diff: src/DartARM32/assembler_arm.h

Issue 1430713003: Add mul instruction to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add i64 multiplication example. Created 5 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
6 // Please update the (git) revision if we merge changes from Dart. 6 // Please update the (git) revision if we merge changes from Dart.
7 // https://code.google.com/p/dart/wiki/GettingTheSource 7 // https://code.google.com/p/dart/wiki/GettingTheSource
8 8
9 #ifndef VM_ASSEMBLER_ARM_H_ 9 #ifndef VM_ASSEMBLER_ARM_H_
10 #define VM_ASSEMBLER_ARM_H_ 10 #define VM_ASSEMBLER_ARM_H_
(...skipping 479 matching lines...) Expand 10 before | Expand all | Expand 10 after
490 void bic(Register rd, Register rn, Operand o, Condition cond = AL); 490 void bic(Register rd, Register rn, Operand o, Condition cond = AL);
491 void bics(Register rd, Register rn, Operand o, Condition cond = AL); 491 void bics(Register rd, Register rn, Operand o, Condition cond = AL);
492 492
493 void mvn(Register rd, Operand o, Condition cond = AL); 493 void mvn(Register rd, Operand o, Condition cond = AL);
494 void mvns(Register rd, Operand o, Condition cond = AL); 494 void mvns(Register rd, Operand o, Condition cond = AL);
495 495
496 // Miscellaneous data-processing instructions. 496 // Miscellaneous data-processing instructions.
497 void clz(Register rd, Register rm, Condition cond = AL); 497 void clz(Register rd, Register rm, Condition cond = AL);
498 498
499 // Multiply instructions. 499 // Multiply instructions.
500 #if 0
501 // Moved to
Jim Stichnoth 2015/10/29 22:17:58 moved to where?
Karl 2015/10/30 14:25:56 Added context.
500 void mul(Register rd, Register rn, Register rm, Condition cond = AL); 502 void mul(Register rd, Register rn, Register rm, Condition cond = AL);
501 void muls(Register rd, Register rn, Register rm, Condition cond = AL); 503 void muls(Register rd, Register rn, Register rm, Condition cond = AL);
504 #endif
502 void mla(Register rd, Register rn, Register rm, Register ra, 505 void mla(Register rd, Register rn, Register rm, Register ra,
503 Condition cond = AL); 506 Condition cond = AL);
504 void mls(Register rd, Register rn, Register rm, Register ra, 507 void mls(Register rd, Register rn, Register rm, Register ra,
505 Condition cond = AL); 508 Condition cond = AL);
506 void smull(Register rd_lo, Register rd_hi, Register rn, Register rm, 509 void smull(Register rd_lo, Register rd_hi, Register rn, Register rm,
507 Condition cond = AL); 510 Condition cond = AL);
508 void umull(Register rd_lo, Register rd_hi, Register rn, Register rm, 511 void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
509 Condition cond = AL); 512 Condition cond = AL);
510 void smlal(Register rd_lo, Register rd_hi, Register rn, Register rm, 513 void smlal(Register rd_lo, Register rd_hi, Register rn, Register rm,
511 Condition cond = AL); 514 Condition cond = AL);
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1146 Register rd, 1149 Register rd,
1147 Register rm, 1150 Register rm,
1148 Operand o); 1151 Operand o);
1149 1152
1150 void EmitShiftRegister(Condition cond, 1153 void EmitShiftRegister(Condition cond,
1151 Shift opcode, 1154 Shift opcode,
1152 Register rd, 1155 Register rd,
1153 Register rm, 1156 Register rm,
1154 Operand o); 1157 Operand o);
1155 1158
1159 #if 0
1160 // Moved to ARM32::AssemblerARM32::emitMulOp
1156 void EmitMulOp(Condition cond, 1161 void EmitMulOp(Condition cond,
1157 int32_t opcode, 1162 int32_t opcode,
1158 Register rd, 1163 Register rd,
1159 Register rn, 1164 Register rn,
1160 Register rm, 1165 Register rm,
1161 Register rs); 1166 Register rs);
1167 #endif
1162 1168
1163 void EmitDivOp(Condition cond, 1169 void EmitDivOp(Condition cond,
1164 int32_t opcode, 1170 int32_t opcode,
1165 Register rd, 1171 Register rd,
1166 Register rn, 1172 Register rn,
1167 Register rm); 1173 Register rm);
1168 1174
1169 void EmitMultiVSMemOp(Condition cond, 1175 void EmitMultiVSMemOp(Condition cond,
1170 BlockAddressMode am, 1176 BlockAddressMode am,
1171 bool load, 1177 bool load,
(...skipping 74 matching lines...) Expand 10 before | Expand all | Expand 10 after
1246 Register new_value, 1252 Register new_value,
1247 FieldContent old_content); 1253 FieldContent old_content);
1248 1254
1249 DISALLOW_ALLOCATION(); 1255 DISALLOW_ALLOCATION();
1250 DISALLOW_COPY_AND_ASSIGN(Assembler); 1256 DISALLOW_COPY_AND_ASSIGN(Assembler);
1251 }; 1257 };
1252 1258
1253 } // namespace dart 1259 } // namespace dart
1254 1260
1255 #endif // VM_ASSEMBLER_ARM_H_ 1261 #endif // VM_ASSEMBLER_ARM_H_
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