Enhance address mode recovery

src/IceInstX8632.cpp

Index: src/IceInstX8632.cpp
diff --git a/src/IceInstX8632.cpp b/src/IceInstX8632.cpp
index 3a8c57c0203c4a78cab150ffd5b46269e9cd47d6..93c3f853d9c429a78453f4bf65042d4cb1c0f044 100644
--- a/src/IceInstX8632.cpp
+++ b/src/IceInstX8632.cpp
@@ -120,9 +120,10 @@ void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const {
     llvm_unreachable("Invalid offset type for x86 mem operand");
   }
 
-  if (Base) {
+  if (Base || Index) {
     Str << "(";
-    Base->emit(Func);
+    if (Base)
+      Base->emit(Func);
     if (Index) {
       Str << ",";
       Index->emit(Func);
@@ -151,8 +152,8 @@ void MachineTraits<TargetX8632>::X86OperandMem::dump(const Cfg *Func,
     Dumped = true;
   }
   if (Index) {
-    assert(Base);
-    Str << "+";
+    if (Base)
+      Str << "+";
     if (Shift > 0)
       Str << (1u << Shift) << "*";
     if (Func)
@@ -216,14 +217,14 @@ MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress(
     return X8632::Traits::Address(
         RegX8632::getEncodedGPR(getBase()->getRegNum()),
         RegX8632::getEncodedGPR(getIndex()->getRegNum()),
-        X8632::Traits::ScaleFactor(getShift()), Disp);
+        X8632::Traits::ScaleFactor(getShift()), Disp, Fixup);
   } else if (getBase()) {
     return X8632::Traits::Address(
-        RegX8632::getEncodedGPR(getBase()->getRegNum()), Disp);
+        RegX8632::getEncodedGPR(getBase()->getRegNum()), Disp, Fixup);
   } else if (getIndex()) {
     return X8632::Traits::Address(
         RegX8632::getEncodedGPR(getIndex()->getRegNum()),
-        X8632::Traits::ScaleFactor(getShift()), Disp);
+        X8632::Traits::ScaleFactor(getShift()), Disp, Fixup);
   } else if (Fixup) {
     return X8632::Traits::Address::Absolute(Disp, Fixup);
   } else {