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1 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=// | 1 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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2648 const Operand *Src = this->getSrc(0); | 2648 const Operand *Src = this->getSrc(0); |
2649 Type Ty = Src->getType(); | 2649 Type Ty = Src->getType(); |
2650 if (const auto Var = llvm::dyn_cast<Variable>(Src)) { | 2650 if (const auto Var = llvm::dyn_cast<Variable>(Src)) { |
2651 if (Var->hasReg()) { | 2651 if (Var->hasReg()) { |
2652 // This is a physical xmm register, so we need to spill it to a temporary | 2652 // This is a physical xmm register, so we need to spill it to a temporary |
2653 // stack slot. | 2653 // stack slot. |
2654 Immediate Width(typeWidthInBytes(Ty)); | 2654 Immediate Width(typeWidthInBytes(Ty)); |
2655 Asm->sub(IceType_i32, | 2655 Asm->sub(IceType_i32, |
2656 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, | 2656 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, |
2657 Width); | 2657 Width); |
| 2658 static constexpr AssemblerFixup *Fixup = nullptr; |
2658 typename InstX86Base<Machine>::Traits::Address StackSlot = | 2659 typename InstX86Base<Machine>::Traits::Address StackSlot = |
2659 typename InstX86Base<Machine>::Traits::Address( | 2660 typename InstX86Base<Machine>::Traits::Address( |
2660 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, 0); | 2661 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, 0, |
| 2662 Fixup); |
2661 Asm->movss(Ty, StackSlot, | 2663 Asm->movss(Ty, StackSlot, |
2662 InstX86Base<Machine>::Traits::RegisterSet::getEncodedXmm( | 2664 InstX86Base<Machine>::Traits::RegisterSet::getEncodedXmm( |
2663 Var->getRegNum())); | 2665 Var->getRegNum())); |
2664 Asm->fld(Ty, StackSlot); | 2666 Asm->fld(Ty, StackSlot); |
2665 Asm->add(IceType_i32, | 2667 Asm->add(IceType_i32, |
2666 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, | 2668 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, |
2667 Width); | 2669 Width); |
2668 } else { | 2670 } else { |
2669 typename InstX86Base<Machine>::Traits::Address StackAddr( | 2671 typename InstX86Base<Machine>::Traits::Address StackAddr( |
2670 static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>( | 2672 static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>( |
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2746 Func->getTarget()) | 2748 Func->getTarget()) |
2747 ->stackVarToAsmOperand(Dest)); | 2749 ->stackVarToAsmOperand(Dest)); |
2748 Asm->fstp(Ty, StackAddr); | 2750 Asm->fstp(Ty, StackAddr); |
2749 } else { | 2751 } else { |
2750 // Dest is a physical (xmm) register, so st(0) needs to go through memory. | 2752 // Dest is a physical (xmm) register, so st(0) needs to go through memory. |
2751 // Hack this by creating a temporary stack slot, spilling st(0) there, | 2753 // Hack this by creating a temporary stack slot, spilling st(0) there, |
2752 // loading it into the xmm register, and deallocating the stack slot. | 2754 // loading it into the xmm register, and deallocating the stack slot. |
2753 Immediate Width(typeWidthInBytes(Ty)); | 2755 Immediate Width(typeWidthInBytes(Ty)); |
2754 Asm->sub(IceType_i32, | 2756 Asm->sub(IceType_i32, |
2755 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, Width); | 2757 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, Width); |
| 2758 static constexpr AssemblerFixup *Fixup = nullptr; |
2756 typename InstX86Base<Machine>::Traits::Address StackSlot = | 2759 typename InstX86Base<Machine>::Traits::Address StackSlot = |
2757 typename InstX86Base<Machine>::Traits::Address( | 2760 typename InstX86Base<Machine>::Traits::Address( |
2758 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, 0); | 2761 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, 0, |
| 2762 Fixup); |
2759 Asm->fstp(Ty, StackSlot); | 2763 Asm->fstp(Ty, StackSlot); |
2760 Asm->movss(Ty, InstX86Base<Machine>::Traits::RegisterSet::getEncodedXmm( | 2764 Asm->movss(Ty, InstX86Base<Machine>::Traits::RegisterSet::getEncodedXmm( |
2761 Dest->getRegNum()), | 2765 Dest->getRegNum()), |
2762 StackSlot); | 2766 StackSlot); |
2763 Asm->add(IceType_i32, | 2767 Asm->add(IceType_i32, |
2764 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, Width); | 2768 InstX86Base<Machine>::Traits::RegisterSet::Encoded_Reg_esp, Width); |
2765 } | 2769 } |
2766 } | 2770 } |
2767 | 2771 |
2768 template <class Machine> | 2772 template <class Machine> |
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3309 return; | 3313 return; |
3310 Ostream &Str = Func->getContext()->getStrDump(); | 3314 Ostream &Str = Func->getContext()->getStrDump(); |
3311 Str << "IACA_END"; | 3315 Str << "IACA_END"; |
3312 } | 3316 } |
3313 | 3317 |
3314 } // end of namespace X86Internal | 3318 } // end of namespace X86Internal |
3315 | 3319 |
3316 } // end of namespace Ice | 3320 } // end of namespace Ice |
3317 | 3321 |
3318 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H | 3322 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H |
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