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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1424773002: Add ADC (immediate) instruction to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 1 month ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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105 bool fixupIsPCRel(FixupKind Kind) const override { 105 bool fixupIsPCRel(FixupKind Kind) const override {
106 (void)Kind; 106 (void)Kind;
107 // TODO(kschimpf) Decide if we need this. 107 // TODO(kschimpf) Decide if we need this.
108 return false; 108 return false;
109 } 109 }
110 110
111 void bind(Label *label); 111 void bind(Label *label);
112 112
113 // List of instructions implemented by integrated assembler. 113 // List of instructions implemented by integrated assembler.
114 114
115 void adc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
116 bool SetFlags, CondARM32::Cond Cond);
117
115 void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 118 void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
116 bool SetFlags, CondARM32::Cond Cond); 119 bool SetFlags, CondARM32::Cond Cond);
117 120
118 void bkpt(uint16_t Imm16); 121 void bkpt(uint16_t Imm16);
119 122
120 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); 123 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond);
121 124
122 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 125 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
123 126
124 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); 127 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL);
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161 // Address is assumed to be defined by decodeAddress() in 164 // Address is assumed to be defined by decodeAddress() in
162 // IceAssemblerARM32.cpp. 165 // IceAssemblerARM32.cpp.
163 void emitMemOp(CondARM32::Cond Cond, uint32_t InstType, bool IsLoad, 166 void emitMemOp(CondARM32::Cond Cond, uint32_t InstType, bool IsLoad,
164 bool IsByte, uint32_t Rt, uint32_t Address); 167 bool IsByte, uint32_t Rt, uint32_t Address);
165 }; 168 };
166 169
167 } // end of namespace ARM32 170 } // end of namespace ARM32
168 } // end of namespace Ice 171 } // end of namespace Ice
169 172
170 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 173 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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