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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1419903002: Subzero: Refactor x86 register definitions to use the alias mechanism. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add some comments Created 5 years, 1 month ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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36 #include "IceTargetLowering.h" 36 #include "IceTargetLowering.h"
37 37
38 namespace Ice { 38 namespace Ice {
39 namespace ARM32 { 39 namespace ARM32 {
40 40
41 class AssemblerARM32 : public Assembler { 41 class AssemblerARM32 : public Assembler {
42 AssemblerARM32(const AssemblerARM32 &) = delete; 42 AssemblerARM32(const AssemblerARM32 &) = delete;
43 AssemblerARM32 &operator=(const AssemblerARM32 &) = delete; 43 AssemblerARM32 &operator=(const AssemblerARM32 &) = delete;
44 44
45 public: 45 public:
46 explicit AssemblerARM32(GlobalContext *Ctx, bool use_far_branches = false) 46 explicit AssemblerARM32(bool use_far_branches = false)
47 : Assembler(Asm_ARM32, Ctx) { 47 : Assembler(Asm_ARM32) {
48 // TODO(kschimpf): Add mode if needed when branches are handled. 48 // TODO(kschimpf): Add mode if needed when branches are handled.
49 (void)use_far_branches; 49 (void)use_far_branches;
50 } 50 }
51 ~AssemblerARM32() override = default; 51 ~AssemblerARM32() override = default;
52 52
53 void alignFunction() override { 53 void alignFunction() override {
54 const SizeT Align = 1 << getBundleAlignLog2Bytes(); 54 const SizeT Align = 1 << getBundleAlignLog2Bytes();
55 SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align); 55 SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align);
56 constexpr uint32_t UndefinedInst = 0xe7fedef0; // udf #60896 56 constexpr uint32_t UndefinedInst = 0xe7fedef0; // udf #60896
57 constexpr SizeT InstSize = sizeof(int32_t); 57 constexpr SizeT InstSize = sizeof(int32_t);
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144 // Address is assumed to be defined by decodeAddress() in 144 // Address is assumed to be defined by decodeAddress() in
145 // IceAssemblerARM32.cpp. 145 // IceAssemblerARM32.cpp.
146 void emitMemOp(CondARM32::Cond Cond, uint32_t InstType, bool IsLoad, 146 void emitMemOp(CondARM32::Cond Cond, uint32_t InstType, bool IsLoad,
147 bool IsByte, uint32_t Rt, uint32_t Address); 147 bool IsByte, uint32_t Rt, uint32_t Address);
148 }; 148 };
149 149
150 } // end of namespace ARM32 150 } // end of namespace ARM32
151 } // end of namespace Ice 151 } // end of namespace Ice
152 152
153 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 153 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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