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Issue 14188016: ARM: clean up code now that ARMv6 is the baseline. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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474 474
475 // For 1 or -1 we need to or in the 0 exponent (biased to 1023). 475 // For 1 or -1 we need to or in the 0 exponent (biased to 1023).
476 const uint32_t exponent_word_for_1 = 476 const uint32_t exponent_word_for_1 =
477 HeapNumber::kExponentBias << HeapNumber::kExponentShift; 477 HeapNumber::kExponentBias << HeapNumber::kExponentShift;
478 __ orr(exponent, exponent, Operand(exponent_word_for_1), LeaveCC, eq); 478 __ orr(exponent, exponent, Operand(exponent_word_for_1), LeaveCC, eq);
479 // 1, 0 and -1 all have 0 for the second word. 479 // 1, 0 and -1 all have 0 for the second word.
480 __ mov(mantissa, Operand::Zero()); 480 __ mov(mantissa, Operand::Zero());
481 __ Ret(); 481 __ Ret();
482 482
483 __ bind(&not_special); 483 __ bind(&not_special);
484 // Count leading zeros. Uses mantissa for a scratch register on pre-ARM5. 484 __ clz(zeros_, source_);
485 // Gets the wrong answer for 0, but we already checked for that case above.
486 __ CountLeadingZeros(zeros_, source_, mantissa);
487 // Compute exponent and or it into the exponent register. 485 // Compute exponent and or it into the exponent register.
488 // We use mantissa as a scratch register here. Use a fudge factor to 486 // We use mantissa as a scratch register here. Use a fudge factor to
489 // divide the constant 31 + HeapNumber::kExponentBias, 0x41d, into two parts 487 // divide the constant 31 + HeapNumber::kExponentBias, 0x41d, into two parts
490 // that fit in the ARM's constant field. 488 // that fit in the ARM's constant field.
491 int fudge = 0x400; 489 int fudge = 0x400;
492 __ rsb(mantissa, zeros_, Operand(31 + HeapNumber::kExponentBias - fudge)); 490 __ rsb(mantissa, zeros_, Operand(31 + HeapNumber::kExponentBias - fudge));
493 __ add(mantissa, mantissa, Operand(fudge)); 491 __ add(mantissa, mantissa, Operand(fudge));
494 __ orr(exponent, 492 __ orr(exponent,
495 exponent, 493 exponent,
496 Operand(mantissa, LSL, HeapNumber::kExponentShift)); 494 Operand(mantissa, LSL, HeapNumber::kExponentShift));
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2024 __ b(mi, &div_with_sdiv); 2022 __ b(mi, &div_with_sdiv);
2025 } else { 2023 } else {
2026 __ b(ne, &not_smi_result); 2024 __ b(ne, &not_smi_result);
2027 // Check for positive and no remainder. 2025 // Check for positive and no remainder.
2028 __ orr(scratch2, scratch1, Operand(0x80000000u)); 2026 __ orr(scratch2, scratch1, Operand(0x80000000u));
2029 __ tst(left, scratch2); 2027 __ tst(left, scratch2);
2030 __ b(ne, &not_smi_result); 2028 __ b(ne, &not_smi_result);
2031 } 2029 }
2032 2030
2033 // Perform division by shifting. 2031 // Perform division by shifting.
2034 __ CountLeadingZeros(scratch1, scratch1, scratch2); 2032 __ clz(scratch1, scratch1);
2035 __ rsb(scratch1, scratch1, Operand(31)); 2033 __ rsb(scratch1, scratch1, Operand(31));
2036 __ mov(right, Operand(left, LSR, scratch1)); 2034 __ mov(right, Operand(left, LSR, scratch1));
2037 __ Ret(); 2035 __ Ret();
2038 2036
2039 if (CpuFeatures::IsSupported(SUDIV)) { 2037 if (CpuFeatures::IsSupported(SUDIV)) {
2040 Label result_not_zero; 2038 Label result_not_zero;
2041 2039
2042 __ bind(&div_with_sdiv); 2040 __ bind(&div_with_sdiv);
2043 // Do division. 2041 // Do division.
2044 __ sdiv(scratch1, left, right); 2042 __ sdiv(scratch1, left, right);
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7528 7526
7529 __ Pop(lr, r5, r1); 7527 __ Pop(lr, r5, r1);
7530 __ Ret(); 7528 __ Ret();
7531 } 7529 }
7532 7530
7533 #undef __ 7531 #undef __
7534 7532
7535 } } // namespace v8::internal 7533 } } // namespace v8::internal
7536 7534
7537 #endif // V8_TARGET_ARCH_ARM 7535 #endif // V8_TARGET_ARCH_ARM
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