Handle branch relative to pc in ARM integrated assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 716 matching lines @@
       Str << getTargetTrue()->getAsmName();
       if (getTargetFalse()) {
         Str << "\n\t"
             << "b"
             << "\t" << getTargetFalse()->getAsmName();
       }
     }
   }
 }
 
+void InstARM32Br::emitIAS(const Cfg *Func) const {
+  ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  if (Label) {
+    Asm->b(Asm->getOrCreateLocalLabel(Label->getNumber()), getPredicate());
+  } else if (isUnconditionalBranch()) {
+    Asm->b(Asm->getOrCreateCfgNodeLabel(getTargetFalse()->getIndex()),
+           getPredicate());
+  } else {
+    Asm->b(Asm->getOrCreateCfgNodeLabel(getTargetTrue()->getIndex()),
+           getPredicate());
+    Asm->b(Asm->getOrCreateCfgNodeLabel(getTargetFalse()->getIndex()),
+           CondARM32::AL);
+  }
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 void InstARM32Br::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "br ";
 
   if (getPredicate() == CondARM32::AL) {
     Str << "label %"
         << (Label ? Label->getName(Func) : getTargetFalse()->getName());
     return;
@@ skipping 677 matching lines @@
 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>;
 
 template class InstARM32ThreeAddrFP<InstARM32::Vadd>;
 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>;
 template class InstARM32ThreeAddrFP<InstARM32::Vmul>;
 template class InstARM32ThreeAddrFP<InstARM32::Vsub>;
 
 template class InstARM32TwoAddrGPR<InstARM32::Movt>;
 
 } // end of namespace Ice