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| 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
| 5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
| 6 // | 6 // |
| 7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
| 8 // | 8 // |
| 9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
| 10 // | 10 // |
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| 143 | 143 |
| 144 void and_(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 144 void and_(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 145 bool SetFlags, CondARM32::Cond Cond); | 145 bool SetFlags, CondARM32::Cond Cond); |
| 146 | 146 |
| 147 void b(Label *L, CondARM32::Cond Cond); | 147 void b(Label *L, CondARM32::Cond Cond); |
| 148 | 148 |
| 149 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); | 149 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); |
| 150 | 150 |
| 151 void bkpt(uint16_t Imm16); | 151 void bkpt(uint16_t Imm16); |
| 152 | 152 |
| 153 void cmp(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); |
| 154 |
| 153 void eor(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 155 void eor(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 154 bool SetFlags, CondARM32::Cond Cond); | 156 bool SetFlags, CondARM32::Cond Cond); |
| 155 | 157 |
| 156 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); | 158 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); |
| 157 | 159 |
| 158 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); | 160 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); |
| 159 | 161 |
| 160 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 162 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 161 bool SetFlags, CondARM32::Cond Cond); | 163 bool SetFlags, CondARM32::Cond Cond); |
| 162 | 164 |
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| 235 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); | 237 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); |
| 236 | 238 |
| 237 // Returns the offset encoded in the branch instruction Inst. | 239 // Returns the offset encoded in the branch instruction Inst. |
| 238 static IOffsetT decodeBranchOffset(IValueT Inst); | 240 static IOffsetT decodeBranchOffset(IValueT Inst); |
| 239 }; | 241 }; |
| 240 | 242 |
| 241 } // end of namespace ARM32 | 243 } // end of namespace ARM32 |
| 242 } // end of namespace Ice | 244 } // end of namespace Ice |
| 243 | 245 |
| 244 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 246 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
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