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Side by Side Diff: src/IceAssemblerARM32.h

Issue 1412923006: Add orr (register) and orr (immediate) to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Merge with master Created 5 years, 1 month ago
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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
2 // 2 //
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
4 // for details. All rights reserved. Use of this source code is governed by a 4 // for details. All rights reserved. Use of this source code is governed by a
5 // BSD-style license that can be found in the LICENSE file. 5 // BSD-style license that can be found in the LICENSE file.
6 // 6 //
7 // Modified by the Subzero authors. 7 // Modified by the Subzero authors.
8 // 8 //
9 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===//
10 // 10 //
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154 154
155 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 155 void mov(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
156 156
157 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 157 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
158 bool SetFlags, CondARM32::Cond Cond); 158 bool SetFlags, CondARM32::Cond Cond);
159 159
160 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 160 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
161 161
162 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); 162 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
163 163
164 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
165 bool SetFlags, CondARM32::Cond Cond);
166
164 void sbc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 167 void sbc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
165 bool SetFlags, CondARM32::Cond Cond); 168 bool SetFlags, CondARM32::Cond Cond);
166 169
167 void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); 170 void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond);
168 171
169 void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, 172 void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
170 bool SetFlags, CondARM32::Cond Cond); 173 bool SetFlags, CondARM32::Cond Cond);
171 174
172 static bool classof(const Assembler *Asm) { 175 static bool classof(const Assembler *Asm) {
173 return Asm->getKind() == Asm_ARM32; 176 return Asm->getKind() == Asm_ARM32;
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213 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); 216 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst);
214 217
215 // Returns the offset encoded in the branch instruction Inst. 218 // Returns the offset encoded in the branch instruction Inst.
216 static IOffsetT decodeBranchOffset(IValueT Inst); 219 static IOffsetT decodeBranchOffset(IValueT Inst);
217 }; 220 };
218 221
219 } // end of namespace ARM32 222 } // end of namespace ARM32
220 } // end of namespace Ice 223 } // end of namespace Ice
221 224
222 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H 225 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H
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