Add "add immediate" instruction to the ARM integrated assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 300 matching lines @@
     TargetFalse = NewNode;
     Found = true;
   }
   if (TargetTrue == OldNode) {
     TargetTrue = NewNode;
     Found = true;
   }
   return Found;
 }
 
+template <InstARM32::InstKindARM32 K>
+void InstARM32ThreeAddrGPR<K>::emitIAS(const Cfg *Func) const {

[John, 2015/10/13 21:27:56]

I am not super exited about these definitions here. Can you leave a TODO(jpp) so
that I (in the near future) figure out how to move these out of this .h?

[Karl, 2015/10/13 21:39:25]

This is in a .cpp file!

+  (void)Func;
+  UnimplementedError(Func->getContext()->getFlags());
+}
+
+template <>
+void InstARM32ThreeAddrGPR<InstARM32::Add>::emitIAS(const Cfg *Func) const {
+  ARM32::AssemblerARM32 *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  Asm->add(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());
+}
+
 InstARM32Call::InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget)
     : InstARM32(Func, InstARM32::Call, 1, Dest) {
   HasSideEffects = true;
   addSource(CallTarget);
 }
 
 InstARM32Label::InstARM32Label(Cfg *Func, TargetARM32 *Target)
     : InstARM32(Func, InstARM32::Label, 0, nullptr),
       Number(Target->makeNextLabelNumber()) {}
 
@@ skipping 267 matching lines @@
   Operand *Src0 = getSrc(0);
   // Note: Loop is used so that we can short circuit using break.
   do {
     if (Dest->hasReg()) {
       Type DestTy = Dest->getType();
       const bool DestIsVector = isVectorType(DestTy);
       const bool DestIsScalarFP = isScalarFloatingType(DestTy);
       const bool CoreVFPMove = isMoveBetweenCoreAndVFPRegisters(Dest, Src0);
       if (DestIsVector || DestIsScalarFP || CoreVFPMove)
         break;
-      if (const auto *FlexImm = llvm::dyn_cast<OperandARM32FlexImm>(Src0)) {
-        Asm->mov(static_cast<RegARM32::GPRRegister>(Dest->getRegNum()),
-                 *FlexImm, getPredicate());
-        return;
-      }
+      Asm->mov(Dest, Src0, getPredicate());
+      return;
     }
   } while (0);
   llvm_unreachable("not yet implemented");
 }
 
 void InstARM32Mov::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(!(isMultiDest() && isMultiSource()) && "Invalid vmov type.");
   if (isMultiDest()) {
@@ skipping 793 matching lines @@
     Reg->dump(Str);
   if (getShiftOp() != kNoShift) {
     Str << ", " << InstARM32ShiftAttributes[getShiftOp()].EmitString << " ";
     if (Func)
       getShiftAmt()->dump(Func);
     else
       getShiftAmt()->dump(Str);
   }
 }
 
+// Force instantition of template classes
+template class InstARM32ThreeAddrGPR<InstARM32::Adc>;
+template class InstARM32ThreeAddrGPR<InstARM32::Add>;
+template class InstARM32ThreeAddrGPR<InstARM32::And>;
+template class InstARM32ThreeAddrGPR<InstARM32::Asr>;
+template class InstARM32ThreeAddrGPR<InstARM32::Bic>;
+template class InstARM32ThreeAddrGPR<InstARM32::Eor>;
+template class InstARM32ThreeAddrGPR<InstARM32::Lsl>;
+template class InstARM32ThreeAddrGPR<InstARM32::Lsr>;
+template class InstARM32ThreeAddrGPR<InstARM32::Mul>;
+template class InstARM32ThreeAddrGPR<InstARM32::Orr>;
+template class InstARM32ThreeAddrGPR<InstARM32::Rsb>;
+template class InstARM32ThreeAddrGPR<InstARM32::Sbc>;
+template class InstARM32ThreeAddrGPR<InstARM32::Sdiv>;
+template class InstARM32ThreeAddrGPR<InstARM32::Sub>;
+template class InstARM32ThreeAddrGPR<InstARM32::Udiv>;
+template class InstARM32ThreeAddrFP<InstARM32::Vadd>;
+template class InstARM32ThreeAddrFP<InstARM32::Vdiv>;
+template class InstARM32ThreeAddrFP<InstARM32::Vmul>;
+template class InstARM32ThreeAddrFP<InstARM32::Vsub>;
+
 } // end of namespace Ice