Generate block labels in the ARM hybrid assembler.

src/IceAssemblerX86Base.h

 //===- subzero/src/IceAssemblerX86Base.h - base x86 assembler -*- C++ -*---===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 134 matching lines @@
   void padWithNop(intptr_t Padding) override {
     while (Padding > MAX_NOP_SIZE) {
       nop(MAX_NOP_SIZE);
       Padding -= MAX_NOP_SIZE;
     }
     if (Padding)
       nop(Padding);
   }
 
   Ice::Label *getCfgNodeLabel(SizeT NodeNumber) override;
-  void bindCfgNodeLabel(SizeT NodeNumber) override;
+  void bindCfgNodeLabel(const CfgNode *Node) override;
   Label *getOrCreateCfgNodeLabel(SizeT Number);
   Label *getOrCreateLocalLabel(SizeT Number);
   void bindLocalLabel(SizeT Number);
 
   bool fixupIsPCRel(FixupKind Kind) const override {
     // Currently assuming this is the only PC-rel relocation type used.
     // TODO(jpp): Traits.PcRelTypes.count(Kind) != 0
     return Kind == Traits::PcRelFixup;
   }
 
@@ skipping 900 matching lines @@
   emitUint8(0x66);
 }
 
 } // end of namespace X86Internal
 
 } // end of namespace Ice
 
 #include "IceAssemblerX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICEASSEMBLERX86BASE_H