Subzero. Misc ARM32 bugfixes.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 856 matching lines @@
   Str << ", ";
   if (auto CR = llvm::dyn_cast<ConstantRelocatable>(Src1)) {
     Str << "#:upper16:";
     CR->emitWithoutPrefix(Func->getTarget());
   } else {
     Src1->emit(Func);
   }
 }
 
 void InstARM32Pop::emit(const Cfg *Func) const {
+  // TODO(jpp): Improve FP register save/restore.
   if (!BuildDefs::dump())
     return;
   SizeT IntegerCount = 0;
   for (const Operand *Op : Dests) {
     if (isScalarIntegerType(Op->getType())) {
       ++IntegerCount;
     }
   }
   Ostream &Str = Func->getContext()->getStrEmit();
-  if (IntegerCount == 0) {
-    Str << "\t@ empty pop";
-    return;
+  if (IntegerCount != 0) {
+    Str << "\t"
+        << "pop"
+        << "\t{";
+    bool PrintComma = false;
+    for (const Operand *Op : Dests) {
+      if (isScalarIntegerType(Op->getType())) {
+        if (PrintComma)
+          Str << ", ";
+        Op->emit(Func);
+        PrintComma = true;
+      }
+    }
+    Str << "}\n";
   }
-  Str << "\t"
-      << "pop"
-      << "\t{";
-  bool PrintComma = false;
+
   for (const Operand *Op : Dests) {
-    if (isScalarIntegerType(Op->getType())) {
-      if (PrintComma)
-        Str << ", ";
-      Op->emit(Func);
-      PrintComma = true;
-    }
+    if (isScalarIntegerType(Op->getType()))
+      continue;
+    Str << "\t"
+        << "vpop"
+        << "\t{";
+    Op->emit(Func);
+    Str << "}\n";
   }
-  Str << "}";
 }
 
 void InstARM32Pop::emitIAS(const Cfg *Func) const {
   (void)Func;
   llvm_unreachable("Not yet implemented");
 }
 
 void InstARM32Pop::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 34 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   getDest()->dump(Func);
   Str << " = sub.i32 ";
   getSrc(0)->dump(Func);
   Str << ", " << Amount << " ; ";
   getSrc(1)->dump(Func);
 }
 
 void InstARM32Push::emit(const Cfg *Func) const {
+  // TODO(jpp): Improve FP register save/restore.
   if (!BuildDefs::dump())
     return;
   SizeT IntegerCount = 0;
   for (SizeT i = 0; i < getSrcSize(); ++i) {
     if (isScalarIntegerType(getSrc(i)->getType())) {
       ++IntegerCount;
     }
   }
   Ostream &Str = Func->getContext()->getStrEmit();
-  if (IntegerCount == 0) {
+  for (SizeT i = getSrcSize(); i > 0; --i) {
+    Operand *Op = getSrc(i - 1);
+    if (isScalarIntegerType(Op->getType()))
+      continue;
     Str << "\t"
-        << "@empty push";
-    return;
+        << "vpush"
+        << "\t{";
+    Op->emit(Func);
+    Str << "}\n";
   }
-  Str << "\t"
-      << "push"
-      << "\t{";
-  bool PrintComma = false;
-  for (SizeT i = 0; i < getSrcSize(); ++i) {
-    Operand *Op = getSrc(i);
-    if (isScalarIntegerType(Op->getType())) {
-      if (PrintComma)
-        Str << ", ";
-      Op->emit(Func);
-      PrintComma = true;
+  if (IntegerCount != 0) {
+    Str << "\t"
+        << "push"
+        << "\t{";
+    bool PrintComma = false;
+    for (SizeT i = 0; i < getSrcSize(); ++i) {
+      Operand *Op = getSrc(i);
+      if (isScalarIntegerType(Op->getType())) {
+        if (PrintComma)
+          Str << ", ";
+        Op->emit(Func);
+        PrintComma = true;
+      }
     }
+    Str << "}\n";
   }
-  Str << "}";
 }
 
 void InstARM32Push::emitIAS(const Cfg *Func) const {
   (void)Func;
   llvm_unreachable("Not yet implemented");
 }
 
 void InstARM32Push::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 458 matching lines @@
 template class InstARM32ThreeAddrGPR<InstARM32::Sbc>;
 template class InstARM32ThreeAddrGPR<InstARM32::Sdiv>;
 template class InstARM32ThreeAddrGPR<InstARM32::Sub>;
 template class InstARM32ThreeAddrGPR<InstARM32::Udiv>;
 template class InstARM32ThreeAddrFP<InstARM32::Vadd>;
 template class InstARM32ThreeAddrFP<InstARM32::Vdiv>;
 template class InstARM32ThreeAddrFP<InstARM32::Vmul>;
 template class InstARM32ThreeAddrFP<InstARM32::Vsub>;
 
 } // end of namespace Ice