Optimize 64-bit compares with zero

tests_lit/llvm2ice_tests/64bit.pnacl.ll

Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll
diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
index 19d6e70a25d5e912445f210483f98d5bebf14707..21a68f99344e4f2eacf07d21454ca5b904929596 100644
--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
@@ -1772,6 +1772,27 @@ if.end3:                                          ; preds = %if.then2, %if.end
 ; ARM32-LABEL: icmpLt64Imm
 ; ARM32-NOT: cmp #{{[0-9a-f]+}},
 
+define internal void @icmpEqZero64Imm() {
+entry:
+  %cmp = icmp eq i64 123, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  call void @func()
+  br label %if.end
+
+if.end:                                          ; preds = %if.then, %if.end
+  ret void
+}
+; The following checks are not strictly necessary since one of the RUN
+; lines actually runs the output through the assembler.
+; CHECK-LABEL: icmpEqZero64Imm
+; CHECK-NOT: cmp 0x{{[0-9a-f]+}},
+; OPTM1-LABEL: icmpEqZero64Imm
+; OPTM1-LABEL-NOT: cmp 0x{{[0-9a-f]+}},
+; ARM32-LABEL: icmpEqZero64Imm
+; ARM32-NOT: cmp #{{[0-9a-f]+}},
+
 define internal i64 @phi64Imm(i32 %x, i64 %y, i64 %z) {
 entry:
   %cond = icmp eq i32 %x, 88