Subzero: Implement "second-chance bin-packing" for register allocation.

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1291 matching lines @@
       std::swap(Src0, Src1);
       ++SwapCount;
     }
     // Improve two-address code patterns by avoiding a copy to the dest
     // register when one of the source operands ends its lifetime here.
     if (!Inst->isLastUse(Src0) && Inst->isLastUse(Src1)) {
       std::swap(Src0, Src1);
       ++SwapCount;
     }
     assert(SwapCount <= 1);
-    (void) SwapCount;
+    (void)SwapCount;
   }
   if (!Traits::Is64Bit && Dest->getType() == IceType_i64) {
     // These x86-32 helper-call-involved instructions are lowered in this
     // separate switch. This is because loOperand() and hiOperand() may insert
     // redundant instructions for constant blinding and pooling. Such redundant
     // instructions will fail liveness analysis under -Om1 setting. And,
     // actually these arguments do not need to be processed with loOperand()
     // and hiOperand() to be used.
     switch (Inst->getOp()) {
     case InstArithmetic::Udiv: {
@@ skipping 4192 matching lines @@
   }
   // the offset is not eligible for blinding or pooling, return the original
   // mem operand
   return MemOperand;
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H