Subzero: Consider all instruction variables for register preference.

src/IceInst.cpp

Index: src/IceInst.cpp
diff --git a/src/IceInst.cpp b/src/IceInst.cpp
index 4a5eb2f30433addd4672f02121b0829a0246d5b0..42cebb84fc91c557a50324dec96cda8f8f89abae 100644
--- a/src/IceInst.cpp
+++ b/src/IceInst.cpp
@@ -249,6 +249,8 @@ InstAssign::InstAssign(Cfg *Func, Variable *Dest, Operand *Source)
   addSource(Source);
 }
 
+bool InstAssign::isVarAssign() const { return llvm::isa<Variable>(getSrc(0)); }
+
 // If TargetTrue==TargetFalse, we turn it into an unconditional branch. This
 // ensures that, along with the 'switch' instruction semantics, there is at
 // most one edge from one node to another.