| OLD | NEW |
| 1 ; Test if we can read store instructions. | 1 ; Test if we can read store instructions. |
| 2 | 2 |
| 3 ; RUN: %p2i -i %s --insts --no-local-syms | FileCheck %s | 3 ; RUN: %p2i -i %s --insts --no-local-syms | FileCheck %s |
| 4 ; RUN: %if --need=allow_disable_ir_gen --command \ | 4 ; RUN: %if --need=allow_disable_ir_gen --command \ |
| 5 ; RUN: %p2i -i %s --args -notranslate -timing -no-ir-gen \ | 5 ; RUN: %p2i -i %s --args -notranslate -timing -no-ir-gen \ |
| 6 ; RUN: | %if --need=allow_disable_ir_gen --command \ | 6 ; RUN: | %if --need=allow_disable_ir_gen --command \ |
| 7 ; RUN: FileCheck --check-prefix=NOIR %s | 7 ; RUN: FileCheck --check-prefix=NOIR %s |
| 8 | 8 |
| 9 define void @store_i8(i32 %addr) { | 9 define internal void @store_i8(i32 %addr) { |
| 10 entry: | 10 entry: |
| 11 %addr_i8 = inttoptr i32 %addr to i8* | 11 %addr_i8 = inttoptr i32 %addr to i8* |
| 12 store i8 3, i8* %addr_i8, align 1 | 12 store i8 3, i8* %addr_i8, align 1 |
| 13 ret void | 13 ret void |
| 14 | 14 |
| 15 ; CHECK: __0: | 15 ; CHECK: __0: |
| 16 ; CHECK-NEXT: store i8 3, i8* %__0, align 1 | 16 ; CHECK-NEXT: store i8 3, i8* %__0, align 1 |
| 17 ; CHECK-NEXT: ret void | 17 ; CHECK-NEXT: ret void |
| 18 } | 18 } |
| 19 | 19 |
| 20 define void @store_i16(i32 %addr) { | 20 define internal void @store_i16(i32 %addr) { |
| 21 entry: | 21 entry: |
| 22 %addr_i16 = inttoptr i32 %addr to i16* | 22 %addr_i16 = inttoptr i32 %addr to i16* |
| 23 store i16 5, i16* %addr_i16, align 1 | 23 store i16 5, i16* %addr_i16, align 1 |
| 24 ret void | 24 ret void |
| 25 | 25 |
| 26 ; CHECK: __0: | 26 ; CHECK: __0: |
| 27 ; CHECK-NEXT: store i16 5, i16* %__0, align 1 | 27 ; CHECK-NEXT: store i16 5, i16* %__0, align 1 |
| 28 ; CHECK-NEXT: ret void | 28 ; CHECK-NEXT: ret void |
| 29 } | 29 } |
| 30 | 30 |
| 31 define void @store_i32(i32 %addr, i32 %v) { | 31 define internal void @store_i32(i32 %addr, i32 %v) { |
| 32 entry: | 32 entry: |
| 33 %addr_i32 = inttoptr i32 %addr to i32* | 33 %addr_i32 = inttoptr i32 %addr to i32* |
| 34 store i32 %v, i32* %addr_i32, align 1 | 34 store i32 %v, i32* %addr_i32, align 1 |
| 35 ret void | 35 ret void |
| 36 | 36 |
| 37 ; CHECK: __0: | 37 ; CHECK: __0: |
| 38 ; CHECK-NEXT: store i32 %__1, i32* %__0, align 1 | 38 ; CHECK-NEXT: store i32 %__1, i32* %__0, align 1 |
| 39 ; CHECK-NEXT: ret void | 39 ; CHECK-NEXT: ret void |
| 40 } | 40 } |
| 41 | 41 |
| 42 define void @store_i64(i32 %addr, i64 %v) { | 42 define internal void @store_i64(i32 %addr, i64 %v) { |
| 43 entry: | 43 entry: |
| 44 %addr_i64 = inttoptr i32 %addr to i64* | 44 %addr_i64 = inttoptr i32 %addr to i64* |
| 45 store i64 %v, i64* %addr_i64, align 1 | 45 store i64 %v, i64* %addr_i64, align 1 |
| 46 ret void | 46 ret void |
| 47 | 47 |
| 48 ; CHECK: __0: | 48 ; CHECK: __0: |
| 49 ; CHECK-NEXT: store i64 %__1, i64* %__0, align 1 | 49 ; CHECK-NEXT: store i64 %__1, i64* %__0, align 1 |
| 50 ; CHECK-NEXT: ret void | 50 ; CHECK-NEXT: ret void |
| 51 } | 51 } |
| 52 | 52 |
| 53 define void @store_float_a1(i32 %addr, float %v) { | 53 define internal void @store_float_a1(i32 %addr, float %v) { |
| 54 entry: | 54 entry: |
| 55 %addr_float = inttoptr i32 %addr to float* | 55 %addr_float = inttoptr i32 %addr to float* |
| 56 store float %v, float* %addr_float, align 1 | 56 store float %v, float* %addr_float, align 1 |
| 57 ret void | 57 ret void |
| 58 | 58 |
| 59 ; TODO(kschimpf) Fix store alignment in ICE to allow non-default. | 59 ; TODO(kschimpf) Fix store alignment in ICE to allow non-default. |
| 60 | 60 |
| 61 ; CHECK: __0: | 61 ; CHECK: __0: |
| 62 ; CHECK-NEXT: store float %__1, float* %__0, align 4 | 62 ; CHECK-NEXT: store float %__1, float* %__0, align 4 |
| 63 ; CHECK-NEXT: ret void | 63 ; CHECK-NEXT: ret void |
| 64 } | 64 } |
| 65 | 65 |
| 66 define void @store_float_a4(i32 %addr, float %v) { | 66 define internal void @store_float_a4(i32 %addr, float %v) { |
| 67 entry: | 67 entry: |
| 68 %addr_float = inttoptr i32 %addr to float* | 68 %addr_float = inttoptr i32 %addr to float* |
| 69 store float %v, float* %addr_float, align 4 | 69 store float %v, float* %addr_float, align 4 |
| 70 ret void | 70 ret void |
| 71 | 71 |
| 72 ; CHECK: __0: | 72 ; CHECK: __0: |
| 73 ; CHECK-NEXT: store float %__1, float* %__0, align 4 | 73 ; CHECK-NEXT: store float %__1, float* %__0, align 4 |
| 74 ; CHECK-NEXT: ret void | 74 ; CHECK-NEXT: ret void |
| 75 } | 75 } |
| 76 | 76 |
| 77 define void @store_double_a1(i32 %addr, double %v) { | 77 define internal void @store_double_a1(i32 %addr, double %v) { |
| 78 entry: | 78 entry: |
| 79 %addr_double = inttoptr i32 %addr to double* | 79 %addr_double = inttoptr i32 %addr to double* |
| 80 store double %v, double* %addr_double, align 1 | 80 store double %v, double* %addr_double, align 1 |
| 81 ret void | 81 ret void |
| 82 | 82 |
| 83 ; TODO(kschimpf) Fix store alignment in ICE to allow non-default. | 83 ; TODO(kschimpf) Fix store alignment in ICE to allow non-default. |
| 84 | 84 |
| 85 ; CHECK: __0: | 85 ; CHECK: __0: |
| 86 ; CHECK-NEXT: store double %__1, double* %__0, align 8 | 86 ; CHECK-NEXT: store double %__1, double* %__0, align 8 |
| 87 ; CHECK-NEXT: ret void | 87 ; CHECK-NEXT: ret void |
| 88 } | 88 } |
| 89 | 89 |
| 90 define void @store_double_a8(i32 %addr, double %v) { | 90 define internal void @store_double_a8(i32 %addr, double %v) { |
| 91 entry: | 91 entry: |
| 92 %addr_double = inttoptr i32 %addr to double* | 92 %addr_double = inttoptr i32 %addr to double* |
| 93 store double %v, double* %addr_double, align 8 | 93 store double %v, double* %addr_double, align 8 |
| 94 ret void | 94 ret void |
| 95 | 95 |
| 96 ; CHECK: __0: | 96 ; CHECK: __0: |
| 97 ; CHECK-NEXT: store double %__1, double* %__0, align 8 | 97 ; CHECK-NEXT: store double %__1, double* %__0, align 8 |
| 98 ; CHECK-NEXT: ret void | 98 ; CHECK-NEXT: ret void |
| 99 } | 99 } |
| 100 | 100 |
| 101 define void @store_v16xI8(i32 %addr, <16 x i8> %v) { | 101 define internal void @store_v16xI8(i32 %addr, <16 x i8> %v) { |
| 102 %addr_v16xI8 = inttoptr i32 %addr to <16 x i8>* | 102 %addr_v16xI8 = inttoptr i32 %addr to <16 x i8>* |
| 103 store <16 x i8> %v, <16 x i8>* %addr_v16xI8, align 1 | 103 store <16 x i8> %v, <16 x i8>* %addr_v16xI8, align 1 |
| 104 ret void | 104 ret void |
| 105 | 105 |
| 106 ; CHECK: __0: | 106 ; CHECK: __0: |
| 107 ; CHECK-NEXT: store <16 x i8> %__1, <16 x i8>* %__0, align 1 | 107 ; CHECK-NEXT: store <16 x i8> %__1, <16 x i8>* %__0, align 1 |
| 108 ; CHECK-NEXT: ret void | 108 ; CHECK-NEXT: ret void |
| 109 } | 109 } |
| 110 | 110 |
| 111 define void @store_v8xI16(i32 %addr, <8 x i16> %v) { | 111 define internal void @store_v8xI16(i32 %addr, <8 x i16> %v) { |
| 112 %addr_v8xI16 = inttoptr i32 %addr to <8 x i16>* | 112 %addr_v8xI16 = inttoptr i32 %addr to <8 x i16>* |
| 113 store <8 x i16> %v, <8 x i16>* %addr_v8xI16, align 2 | 113 store <8 x i16> %v, <8 x i16>* %addr_v8xI16, align 2 |
| 114 ret void | 114 ret void |
| 115 | 115 |
| 116 ; CHECK: __0: | 116 ; CHECK: __0: |
| 117 ; CHECK-NEXT: store <8 x i16> %__1, <8 x i16>* %__0, align 2 | 117 ; CHECK-NEXT: store <8 x i16> %__1, <8 x i16>* %__0, align 2 |
| 118 ; CHECK-NEXT: ret void | 118 ; CHECK-NEXT: ret void |
| 119 } | 119 } |
| 120 | 120 |
| 121 define void @store_v4xI32(i32 %addr, <4 x i32> %v) { | 121 define internal void @store_v4xI32(i32 %addr, <4 x i32> %v) { |
| 122 %addr_v4xI32 = inttoptr i32 %addr to <4 x i32>* | 122 %addr_v4xI32 = inttoptr i32 %addr to <4 x i32>* |
| 123 store <4 x i32> %v, <4 x i32>* %addr_v4xI32, align 4 | 123 store <4 x i32> %v, <4 x i32>* %addr_v4xI32, align 4 |
| 124 ret void | 124 ret void |
| 125 | 125 |
| 126 ; CHECK: __0: | 126 ; CHECK: __0: |
| 127 ; CHECK-NEXT: store <4 x i32> %__1, <4 x i32>* %__0, align 4 | 127 ; CHECK-NEXT: store <4 x i32> %__1, <4 x i32>* %__0, align 4 |
| 128 ; CHECK-NEXT: ret void | 128 ; CHECK-NEXT: ret void |
| 129 } | 129 } |
| 130 | 130 |
| 131 define void @store_v4xFloat(i32 %addr, <4 x float> %v) { | 131 define internal void @store_v4xFloat(i32 %addr, <4 x float> %v) { |
| 132 %addr_v4xFloat = inttoptr i32 %addr to <4 x float>* | 132 %addr_v4xFloat = inttoptr i32 %addr to <4 x float>* |
| 133 store <4 x float> %v, <4 x float>* %addr_v4xFloat, align 4 | 133 store <4 x float> %v, <4 x float>* %addr_v4xFloat, align 4 |
| 134 ret void | 134 ret void |
| 135 | 135 |
| 136 ; CHECK: __0: | 136 ; CHECK: __0: |
| 137 ; CHECK-NEXT: store <4 x float> %__1, <4 x float>* %__0, align 4 | 137 ; CHECK-NEXT: store <4 x float> %__1, <4 x float>* %__0, align 4 |
| 138 ; CHECK-NEXT: ret void | 138 ; CHECK-NEXT: ret void |
| 139 } | 139 } |
| 140 | 140 |
| 141 ; NOIR: Total across all functions | 141 ; NOIR: Total across all functions |
| OLD | NEW |