Subzero. Adds ldrex, strex, and dmb support (ARM32)

src/IceTargetLoweringARM32.h

 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 223 matching lines @@
     Context.insert(InstARM32Br::create(Func, Label, Condition));
   }
   void _cmp(Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Cmp::create(Func, Src0, Src1, Pred));
   }
   void _clz(Variable *Dest, Variable *Src0,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Clz::create(Func, Dest, Src0, Pred));
   }
+  void _dmb() { Context.insert(InstARM32Dmb::create(Func)); }
   void _eor(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Eor::create(Func, Dest, Src0, Src1, Pred));
   }
   /// _ldr, for all your memory to Variable data moves. It handles all types
   /// (integer, floating point, and vectors.) Addr needs to be valid for Dest's
   /// type (e.g., no immediates for vector loads, and no index registers for fp
   /// loads.)
   void _ldr(Variable *Dest, OperandARM32Mem *Addr,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Ldr::create(Func, Dest, Addr, Pred));
   }
+  void _ldrex(Variable *Dest, OperandARM32Mem *Addr,
+             CondARM32::Cond Pred = CondARM32::AL) {
+   Context.insert(InstARM32Ldrex::create(Func, Dest, Addr, Pred));
+   if (auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest)) {
+     Context.insert(InstFakeDef::create(Func, Dest64->getLo(), Dest));
+     Context.insert(InstFakeDef::create(Func, Dest64->getHi(), Dest));
+   }
+ }
   void _lsl(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Lsl::create(Func, Dest, Src0, Src1, Pred));
   }
   void _lsr(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Lsr::create(Func, Dest, Src0, Src1, Pred));
   }
   void _mla(Variable *Dest, Variable *Src0, Variable *Src1, Variable *Acc,
             CondARM32::Cond Pred = CondARM32::AL) {
@@ skipping 101 matching lines @@
   void _sdiv(Variable *Dest, Variable *Src0, Variable *Src1,
              CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Sdiv::create(Func, Dest, Src0, Src1, Pred));
   }
   /// _str, for all your Variable to memory transfers. Addr has the same
   /// restrictions that it does in _ldr.
   void _str(Variable *Value, OperandARM32Mem *Addr,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Str::create(Func, Value, Addr, Pred));
   }
+  void _strex(Variable *Dest, Variable *Value, OperandARM32Mem *Addr,
+              CondARM32::Cond Pred = CondARM32::AL) {
+    if (auto *Value64 = llvm::dyn_cast<Variable64On32>(Value)) {
+      Context.insert(InstFakeUse::create(Func, Value64->getLo()));
+      Context.insert(InstFakeUse::create(Func, Value64->getHi()));
+    }
+    Context.insert(InstARM32Strex::create(Func, Dest, Value, Addr, Pred));
+  }
   void _sub(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Sub::create(Func, Dest, Src0, Src1, Pred));
   }
   void _subs(Variable *Dest, Variable *Src0, Operand *Src1,
              CondARM32::Cond Pred = CondARM32::AL) {
     constexpr bool SetFlags = true;
     Context.insert(
         InstARM32Sub::create(Func, Dest, Src0, Src1, Pred, SetFlags));
   }
@@ skipping 168 matching lines @@
 
 private:
   ~TargetHeaderARM32() = default;
 
   TargetARM32Features CPUFeatures;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H