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Side by Side Diff: src/IceTargetLoweringX86BaseImpl.h

Issue 1371703003: Generate better two address code by using commutativity (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Address code review comments in test Created 5 years, 2 months ago
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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1286 _mov(DestHi, T_3); 1286 _mov(DestHi, T_3);
1287 } 1287 }
1288 } 1288 }
1289 1289
1290 template <class Machine> 1290 template <class Machine>
1291 void TargetX86Base<Machine>::lowerArithmetic(const InstArithmetic *Inst) { 1291 void TargetX86Base<Machine>::lowerArithmetic(const InstArithmetic *Inst) {
1292 Variable *Dest = Inst->getDest(); 1292 Variable *Dest = Inst->getDest();
1293 Operand *Src0 = legalize(Inst->getSrc(0)); 1293 Operand *Src0 = legalize(Inst->getSrc(0));
1294 Operand *Src1 = legalize(Inst->getSrc(1)); 1294 Operand *Src1 = legalize(Inst->getSrc(1));
1295 if (Inst->isCommutative()) { 1295 if (Inst->isCommutative()) {
1296 if (!llvm::isa<Variable>(Src0) && llvm::isa<Variable>(Src1)) 1296 uint32_t SwapCount = 0;
1297 if (!llvm::isa<Variable>(Src0) && llvm::isa<Variable>(Src1)) {
1297 std::swap(Src0, Src1); 1298 std::swap(Src0, Src1);
1298 if (llvm::isa<Constant>(Src0) && !llvm::isa<Constant>(Src1)) 1299 ++SwapCount;
1300 }
1301 if (llvm::isa<Constant>(Src0) && !llvm::isa<Constant>(Src1)) {
1299 std::swap(Src0, Src1); 1302 std::swap(Src0, Src1);
1303 ++SwapCount;
1304 }
1305 // Improve two-address code patterns by avoiding a copy to the dest
1306 // register when one of the source operands ends its lifetime here.
1307 if (!Inst->isLastUse(Src0) && Inst->isLastUse(Src1)) {
1308 std::swap(Src0, Src1);
1309 ++SwapCount;
1310 }
1311 assert(SwapCount <= 1);
1312 (void) SwapCount;
1300 } 1313 }
1301 if (!Traits::Is64Bit && Dest->getType() == IceType_i64) { 1314 if (!Traits::Is64Bit && Dest->getType() == IceType_i64) {
1302 // These x86-32 helper-call-involved instructions are lowered in this 1315 // These x86-32 helper-call-involved instructions are lowered in this
1303 // separate switch. This is because loOperand() and hiOperand() may insert 1316 // separate switch. This is because loOperand() and hiOperand() may insert
1304 // redundant instructions for constant blinding and pooling. Such redundant 1317 // redundant instructions for constant blinding and pooling. Such redundant
1305 // instructions will fail liveness analysis under -Om1 setting. And, 1318 // instructions will fail liveness analysis under -Om1 setting. And,
1306 // actually these arguments do not need to be processed with loOperand() 1319 // actually these arguments do not need to be processed with loOperand()
1307 // and hiOperand() to be used. 1320 // and hiOperand() to be used.
1308 switch (Inst->getOp()) { 1321 switch (Inst->getOp()) {
1309 case InstArithmetic::Udiv: { 1322 case InstArithmetic::Udiv: {
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5502 } 5515 }
5503 // the offset is not eligible for blinding or pooling, return the original 5516 // the offset is not eligible for blinding or pooling, return the original
5504 // mem operand 5517 // mem operand
5505 return MemOperand; 5518 return MemOperand;
5506 } 5519 }
5507 5520
5508 } // end of namespace X86Internal 5521 } // end of namespace X86Internal
5509 } // end of namespace Ice 5522 } // end of namespace Ice
5510 5523
5511 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H 5524 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H
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