Generate better two address code by using commutativity

tests_lit/llvm2ice_tests/commutativity.ll

+; Test the lowering sequence for commutative operations.  If there is a source
+; operand whose lifetime ends in an operation, it should be the first operand,
+; eliminating the need for a move to start the new lifetime.
+
+; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
+; RUN:   --target x8632 -i %s --args -O2 \
+; RUN:   | %if --need=target_X8632 --command FileCheck %s
+
+declare void @useInteger(i32 %arg)
+declare void @useFloat(float %arg)
+
+define void @integerAddLeft(i32 %a, i32 %b) {
+entry:
+  %tmp = add i32 %a, %b
+  %result = add i32 %a, %tmp
+  tail call void @useInteger(i32 %result)
+  ret void
+}
+; CHECK-LABEL: integerAddLeft
+; CHECK-NOT: mov [[REG1:e.x]],[[REG2:e.x]]

[Jim Stichnoth, 2015/10/06 19:35:49]

A few problems here.

1. You're matching eax/ebx/ecx/edx but not ebp/esi/edi?

2. The [[pattern]] usage is probably wrong here.  It's used for "capturing"
patterns and checking for exact repetition later.  Maybe you meant {{pattern}}
for non-captured regular expressions? 
http://llvm.org/docs/CommandGuide/FileCheck.html

3. I think the test could be better as something like this:

declare void @dummy()

define i32 @integerAddLeft(i32 %a, i32 %b) {
entry:
  call void @dummy()
  %tmp = add i32 %a, %b
  %result = add i32 %a, %tmp
  ret i32 %result
}
; CHECK-LABEL: integerAddLeft
; CHECK: call dummy
; CHECK-NEXT: add {{e..}},{{e..}}
; CHECK-NEXT: add {{e..}},{{e..}}

The "call dummy" trick lets you know that we're out of the prolog.

A failing test would have a mov between the call and the first add instruction.

[sehr, 2015/10/07 00:18:30]

Completely revamped per your comments here and in hangouts.

+; CHECK: add [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: add [[REG1:e.x]],[[REG2:e.x]]
+
+define void @integerAddRight(i32 %a, i32 %b) {
+entry:
+  %tmp = add i32 %a, %b
+  %result = add i32 %b, %tmp
+  tail call void @useInteger(i32 %result)
+  ret void
+}
+; CHECK-LABEL: integerAddRight
+; CHECK-NOT: mov [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: add [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: add [[REG1:e.x]],[[REG2:e.x]]
+
+define void @integerMultiplyLeft(i32 %a, i32 %b) {
+entry:
+  %tmp = mul i32 %a, %b
+  %result = mul i32 %a, %tmp
+  tail call void @useInteger(i32 %result)
+  ret void
+}
+; CHECK-LABEL: integerMultiplyLeft
+; CHECK-NOT: mov [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: mul [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: mul [[REG1:e.x]],[[REG2:e.x]]
+
+define void @integerMultiplyRight(i32 %a, i32 %b) {
+entry:
+  %tmp = mul i32 %a, %b
+  %result = mul i32 %b, %tmp
+  tail call void @useInteger(i32 %result)
+  ret void
+}
+; CHECK-LABEL: integerMultiplyRight
+; CHECK-NOT: mov [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: mul [[REG1:e.x]],[[REG2:e.x]]
+; CHECK: mul [[REG1:e.x]],[[REG2:e.x]]
+
+define void @floatAddLeft(float %a, float %b) {
+entry:
+  %tmp = fadd float %a, %b
+  %result = fadd float %a, %tmp
+  tail call void @useFloat(float %result)
+  ret void
+}
+; CHECK-LABEL: floatAddLeft
+; CHECK-NOT: movss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: addss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: addss [[REG1:xmm.]],[[REG2:xmm.]]
+
+define void @floatAddRight(float %a, float %b) {
+entry:
+  %tmp = fadd float %a, %b
+  %result = fadd float %b, %tmp
+  tail call void @useFloat(float %result)
+  ret void
+}
+; CHECK-LABEL: floatAddRight
+; CHECK-NOT: movss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: addss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: addss [[REG1:xmm.]],[[REG2:xmm.]]
+
+define void @floatMultiplyLeft(float %a, float %b) {
+entry:
+  %tmp = fmul float %a, %b
+  %result = fmul float %a, %tmp
+  tail call void @useFloat(float %result)
+  ret void
+}
+; CHECK-LABEL: floatMultiplyLeft
+; CHECK-NOT: movss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: mulss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: mulss [[REG1:xmm.]],[[REG2:xmm.]]
+
+define void @floatMultiplyRight(float %a, float %b) {
+entry:
+  %tmp = fmul float %a, %b
+  %result = fmul float %b, %tmp
+  tail call void @useFloat(float %result)
+  ret void
+}
+; CHECK-LABEL: floatMultiplyRight
+; CHECK-NOT: movss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: mulss [[REG1:xmm.]],[[REG2:xmm.]]
+; CHECK: mulss [[REG1:xmm.]],[[REG2:xmm.]]