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Issue 1332923005: Remove remaining uses of null's absolute address from non-IA32. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 5 years, 3 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/longjump.h" 9 #include "vm/longjump.h"
10 #include "vm/runtime_entry.h" 10 #include "vm/runtime_entry.h"
11 #include "vm/simulator.h" 11 #include "vm/simulator.h"
12 #include "vm/stack_frame.h" 12 #include "vm/stack_frame.h"
13 #include "vm/stub_code.h" 13 #include "vm/stub_code.h"
14 14
15 namespace dart { 15 namespace dart {
16 16
17 #if defined(USING_SIMULATOR) 17 #if defined(USING_SIMULATOR)
18 DECLARE_FLAG(int, trace_sim_after); 18 DECLARE_FLAG(int, trace_sim_after);
19 #endif 19 #endif
20 DECLARE_FLAG(bool, allow_absolute_addresses);
20 DEFINE_FLAG(bool, print_stop_message, false, "Print stop message."); 21 DEFINE_FLAG(bool, print_stop_message, false, "Print stop message.");
21 DECLARE_FLAG(bool, inline_alloc); 22 DECLARE_FLAG(bool, inline_alloc);
22 23
23 void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) { 24 void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) {
24 ASSERT(Utils::IsAligned(data, 4)); 25 ASSERT(Utils::IsAligned(data, 4));
25 ASSERT(Utils::IsAligned(length, 4)); 26 ASSERT(Utils::IsAligned(length, 4));
26 const uword end = data + length; 27 const uword end = data + length;
27 while (data < end) { 28 while (data < end) {
28 *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction; 29 *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction;
29 data += 4; 30 data += 4;
(...skipping 482 matching lines...) Expand 10 before | Expand all | Expand 10 after
512 // no constant pool is set up (e.g. intrinsic code). 513 // no constant pool is set up (e.g. intrinsic code).
513 if (Thread::CanLoadFromThread(object)) { 514 if (Thread::CanLoadFromThread(object)) {
514 lw(rd, Address(THR, Thread::OffsetFromThread(object))); 515 lw(rd, Address(THR, Thread::OffsetFromThread(object)));
515 return; 516 return;
516 } 517 }
517 ASSERT(!in_delay_slot_); 518 ASSERT(!in_delay_slot_);
518 // Smis and VM heap objects are never relocated; do not use object pool. 519 // Smis and VM heap objects are never relocated; do not use object pool.
519 if (object.IsSmi()) { 520 if (object.IsSmi()) {
520 LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw())); 521 LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()));
521 } else if (object.InVMHeap() || !constant_pool_allowed()) { 522 } else if (object.InVMHeap() || !constant_pool_allowed()) {
523 ASSERT(FLAG_allow_absolute_addresses);
522 // Make sure that class CallPattern is able to decode this load immediate. 524 // Make sure that class CallPattern is able to decode this load immediate.
523 int32_t object_raw = reinterpret_cast<int32_t>(object.raw()); 525 int32_t object_raw = reinterpret_cast<int32_t>(object.raw());
524 const uint16_t object_low = Utils::Low16Bits(object_raw); 526 const uint16_t object_low = Utils::Low16Bits(object_raw);
525 const uint16_t object_high = Utils::High16Bits(object_raw); 527 const uint16_t object_high = Utils::High16Bits(object_raw);
526 lui(rd, Immediate(object_high)); 528 lui(rd, Immediate(object_high));
527 ori(rd, rd, Immediate(object_low)); 529 ori(rd, rd, Immediate(object_low));
528 } else { 530 } else {
529 // Make sure that class CallPattern is able to decode this load from the 531 // Make sure that class CallPattern is able to decode this load from the
530 // object pool. 532 // object pool.
531 const int32_t offset = ObjectPool::element_offset( 533 const int32_t offset = ObjectPool::element_offset(
(...skipping 320 matching lines...) Expand 10 before | Expand all | Expand 10 after
852 Register temp_reg, 854 Register temp_reg,
853 Heap::Space space, 855 Heap::Space space,
854 bool inline_isolate) { 856 bool inline_isolate) {
855 ASSERT(!in_delay_slot_); 857 ASSERT(!in_delay_slot_);
856 ASSERT(temp_reg != kNoRegister); 858 ASSERT(temp_reg != kNoRegister);
857 ASSERT(temp_reg != TMP); 859 ASSERT(temp_reg != TMP);
858 ASSERT(cid > 0); 860 ASSERT(cid > 0);
859 intptr_t counter_offset = 861 intptr_t counter_offset =
860 ClassTable::CounterOffsetFor(cid, space == Heap::kNew); 862 ClassTable::CounterOffsetFor(cid, space == Heap::kNew);
861 if (inline_isolate) { 863 if (inline_isolate) {
864 ASSERT(FLAG_allow_absolute_addresses);
862 ClassTable* class_table = Isolate::Current()->class_table(); 865 ClassTable* class_table = Isolate::Current()->class_table();
863 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); 866 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid);
864 if (cid < kNumPredefinedCids) { 867 if (cid < kNumPredefinedCids) {
865 LoadImmediate( 868 LoadImmediate(
866 temp_reg, reinterpret_cast<uword>(*table_ptr) + counter_offset); 869 temp_reg, reinterpret_cast<uword>(*table_ptr) + counter_offset);
867 } else { 870 } else {
868 ASSERT(temp_reg != kNoRegister); 871 ASSERT(temp_reg != kNoRegister);
869 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr)); 872 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr));
870 lw(temp_reg, Address(temp_reg, 0)); 873 lw(temp_reg, Address(temp_reg, 0));
871 AddImmediate(temp_reg, counter_offset); 874 AddImmediate(temp_reg, counter_offset);
(...skipping 58 matching lines...) Expand 10 before | Expand all | Expand 10 after
930 void Assembler::MaybeTraceAllocation(intptr_t cid, 933 void Assembler::MaybeTraceAllocation(intptr_t cid,
931 Register temp_reg, 934 Register temp_reg,
932 Label* trace, 935 Label* trace,
933 bool inline_isolate) { 936 bool inline_isolate) {
934 ASSERT(cid > 0); 937 ASSERT(cid > 0);
935 ASSERT(!in_delay_slot_); 938 ASSERT(!in_delay_slot_);
936 ASSERT(temp_reg != kNoRegister); 939 ASSERT(temp_reg != kNoRegister);
937 ASSERT(temp_reg != TMP); 940 ASSERT(temp_reg != TMP);
938 intptr_t state_offset = ClassTable::StateOffsetFor(cid); 941 intptr_t state_offset = ClassTable::StateOffsetFor(cid);
939 if (inline_isolate) { 942 if (inline_isolate) {
943 ASSERT(FLAG_allow_absolute_addresses);
940 ClassTable* class_table = Isolate::Current()->class_table(); 944 ClassTable* class_table = Isolate::Current()->class_table();
941 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); 945 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid);
942 if (cid < kNumPredefinedCids) { 946 if (cid < kNumPredefinedCids) {
943 LoadImmediate(temp_reg, 947 LoadImmediate(temp_reg,
944 reinterpret_cast<uword>(*table_ptr) + state_offset); 948 reinterpret_cast<uword>(*table_ptr) + state_offset);
945 } else { 949 } else {
946 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr)); 950 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr));
947 lw(temp_reg, Address(temp_reg, 0)); 951 lw(temp_reg, Address(temp_reg, 0));
948 AddImmediate(temp_reg, state_offset); 952 AddImmediate(temp_reg, state_offset);
949 } 953 }
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1322 Label stop; 1326 Label stop;
1323 b(&stop); 1327 b(&stop);
1324 Emit(reinterpret_cast<int32_t>(message)); 1328 Emit(reinterpret_cast<int32_t>(message));
1325 Bind(&stop); 1329 Bind(&stop);
1326 break_(Instr::kStopMessageCode); 1330 break_(Instr::kStopMessageCode);
1327 } 1331 }
1328 1332
1329 } // namespace dart 1333 } // namespace dart
1330 1334
1331 #endif // defined TARGET_ARCH_MIPS 1335 #endif // defined TARGET_ARCH_MIPS
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