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Issue 13008018: ARM: Fix bugs in softfloat code path. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2627 BinaryOpIC::TypeInfo left_type, 2627 BinaryOpIC::TypeInfo left_type,
2628 BinaryOpIC::TypeInfo right_type, 2628 BinaryOpIC::TypeInfo right_type,
2629 bool smi_operands, 2629 bool smi_operands,
2630 Label* not_numbers, 2630 Label* not_numbers,
2631 Label* gc_required, 2631 Label* gc_required,
2632 Label* miss, 2632 Label* miss,
2633 Token::Value op, 2633 Token::Value op,
2634 OverwriteMode mode) { 2634 OverwriteMode mode) {
2635 Register left = r1; 2635 Register left = r1;
2636 Register right = r0; 2636 Register right = r0;
2637 Register scratch1 = r7; 2637 Register scratch1 = r6;
2638 Register scratch2 = r9; 2638 Register scratch2 = r7;
2639 Register scratch3 = r4; 2639 Register scratch3 = r4;
2640 2640
2641 ASSERT(smi_operands || (not_numbers != NULL)); 2641 ASSERT(smi_operands || (not_numbers != NULL));
2642 if (smi_operands) { 2642 if (smi_operands) {
2643 __ AssertSmi(left); 2643 __ AssertSmi(left);
2644 __ AssertSmi(right); 2644 __ AssertSmi(right);
2645 } 2645 }
2646 if (left_type == BinaryOpIC::SMI) { 2646 if (left_type == BinaryOpIC::SMI) {
2647 __ JumpIfNotSmi(left, miss); 2647 __ JumpIfNotSmi(left, miss);
2648 } 2648 }
2649 if (right_type == BinaryOpIC::SMI) { 2649 if (right_type == BinaryOpIC::SMI) {
2650 __ JumpIfNotSmi(right, miss); 2650 __ JumpIfNotSmi(right, miss);
2651 } 2651 }
2652 2652
2653 Register heap_number_map = r6; 2653 Register heap_number_map = r9;
2654 __ LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex); 2654 __ LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
2655 2655
2656 switch (op) { 2656 switch (op) {
2657 case Token::ADD: 2657 case Token::ADD:
2658 case Token::SUB: 2658 case Token::SUB:
2659 case Token::MUL: 2659 case Token::MUL:
2660 case Token::DIV: 2660 case Token::DIV:
2661 case Token::MOD: { 2661 case Token::MOD: {
2662 // Load left and right operands into d6 and d7 or r0/r1 and r2/r3 2662 // Load left and right operands into d6 and d7 or r0/r1 and r2/r3
2663 // depending on whether VFP3 is available or not. 2663 // depending on whether VFP3 is available or not.
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8062 8062
8063 __ Pop(lr, r5, r1); 8063 __ Pop(lr, r5, r1);
8064 __ Ret(); 8064 __ Ret();
8065 } 8065 }
8066 8066
8067 #undef __ 8067 #undef __
8068 8068
8069 } } // namespace v8::internal 8069 } } // namespace v8::internal
8070 8070
8071 #endif // V8_TARGET_ARCH_ARM 8071 #endif // V8_TARGET_ARCH_ARM
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