OLD | NEW |
1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. |
6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/constants_arm64.h" | 9 #include "vm/constants_arm64.h" |
10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
(...skipping 16 matching lines...) Expand all Loading... |
27 | 27 |
28 Register reg; | 28 Register reg; |
29 ic_data_load_end_ = | 29 ic_data_load_end_ = |
30 InstructionPattern::DecodeLoadWordFromPool(end_ - Instr::kInstrSize, | 30 InstructionPattern::DecodeLoadWordFromPool(end_ - Instr::kInstrSize, |
31 ®, | 31 ®, |
32 &target_address_pool_index_); | 32 &target_address_pool_index_); |
33 ASSERT(reg == IP0); | 33 ASSERT(reg == IP0); |
34 } | 34 } |
35 | 35 |
36 | 36 |
| 37 NativeCallPattern::NativeCallPattern(uword pc, const Code& code) |
| 38 : object_pool_(ObjectPool::Handle(code.GetObjectPool())), |
| 39 end_(pc), |
| 40 native_function_pool_index_(-1), |
| 41 target_address_pool_index_(-1) { |
| 42 ASSERT(code.ContainsInstructionAt(pc)); |
| 43 // Last instruction: blr ip0. |
| 44 ASSERT(*(reinterpret_cast<uint32_t*>(end_) - 1) == 0xd63f0200); |
| 45 |
| 46 Register reg; |
| 47 uword native_function_load_end = |
| 48 InstructionPattern::DecodeLoadWordFromPool(end_ - Instr::kInstrSize, |
| 49 ®, |
| 50 &target_address_pool_index_); |
| 51 ASSERT(reg == IP0); |
| 52 InstructionPattern::DecodeLoadWordFromPool(native_function_load_end, |
| 53 ®, |
| 54 &native_function_pool_index_); |
| 55 ASSERT(reg == R5); |
| 56 } |
| 57 |
| 58 |
| 59 uword NativeCallPattern::target() const { |
| 60 return object_pool_.RawValueAt(target_address_pool_index_); |
| 61 } |
| 62 |
| 63 |
| 64 void NativeCallPattern::set_target(uword target_address) const { |
| 65 object_pool_.SetRawValueAt(target_address_pool_index_, target_address); |
| 66 // No need to flush the instruction cache, since the code is not modified. |
| 67 } |
| 68 |
| 69 |
| 70 NativeFunction NativeCallPattern::native_function() const { |
| 71 return reinterpret_cast<NativeFunction>( |
| 72 object_pool_.RawValueAt(native_function_pool_index_)); |
| 73 } |
| 74 |
| 75 |
| 76 void NativeCallPattern::set_native_function(NativeFunction func) const { |
| 77 object_pool_.SetRawValueAt(native_function_pool_index_, |
| 78 reinterpret_cast<uword>(func)); |
| 79 } |
| 80 |
| 81 |
37 intptr_t InstructionPattern::OffsetFromPPIndex(intptr_t index) { | 82 intptr_t InstructionPattern::OffsetFromPPIndex(intptr_t index) { |
38 return Array::element_offset(index); | 83 return Array::element_offset(index); |
39 } | 84 } |
40 | 85 |
41 | 86 |
42 // Decodes a load sequence ending at 'end' (the last instruction of the load | 87 // Decodes a load sequence ending at 'end' (the last instruction of the load |
43 // sequence is the instruction before the one at end). Returns a pointer to | 88 // sequence is the instruction before the one at end). Returns a pointer to |
44 // the first instruction in the sequence. Returns the register being loaded | 89 // the first instruction in the sequence. Returns the register being loaded |
45 // and the loaded object in the output parameters 'reg' and 'obj' | 90 // and the loaded object in the output parameters 'reg' and 'obj' |
46 // respectively. | 91 // respectively. |
(...skipping 319 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
366 bool ReturnPattern::IsValid() const { | 411 bool ReturnPattern::IsValid() const { |
367 Instr* bx_lr = Instr::At(pc_); | 412 Instr* bx_lr = Instr::At(pc_); |
368 const Register crn = ConcreteRegister(LR); | 413 const Register crn = ConcreteRegister(LR); |
369 const int32_t instruction = RET | (static_cast<int32_t>(crn) << kRnShift); | 414 const int32_t instruction = RET | (static_cast<int32_t>(crn) << kRnShift); |
370 return bx_lr->InstructionBits() == instruction; | 415 return bx_lr->InstructionBits() == instruction; |
371 } | 416 } |
372 | 417 |
373 } // namespace dart | 418 } // namespace dart |
374 | 419 |
375 #endif // defined TARGET_ARCH_ARM64 | 420 #endif // defined TARGET_ARCH_ARM64 |
OLD | NEW |