VM: Refactor allocation stats code and remove duplicate code.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 3327 matching lines @@
 
 
 void Assembler::LeaveStubFrame() {
   LeaveFrame((1 << PP) | (1 << FP) | (1 << LR));
   // Adjust SP for null PC pushed in EnterStubFrame.
   AddImmediate(SP, kWordSize);
 }
 
 
 void Assembler::LoadAllocationStatsAddress(Register dest,
-                                           intptr_t cid) {
+                                           intptr_t cid,
+                                           bool inline_isolate) {
   ASSERT(dest != kNoRegister);
   ASSERT(dest != TMP);
   ASSERT(cid > 0);
-  Isolate* isolate = Isolate::Current();
-  ClassTable* class_table = isolate->class_table();
-  if (cid < kNumPredefinedCids) {
-    const uword class_heap_stats_table_address =
-        class_table->PredefinedClassHeapStatsTableAddress();
-    const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
-    LoadImmediate(dest, class_heap_stats_table_address + class_offset);
+  const intptr_t class_offset = ClassTable::ClassOffsetFor(cid);
+  if (inline_isolate) {
+    ClassTable* class_table = Isolate::Current()->class_table();
+    ClassHeapStats** table_ptr = class_table->TableAddressFor(cid);
+    if (cid < kNumPredefinedCids) {
+      LoadImmediate(dest, reinterpret_cast<uword>(*table_ptr) + class_offset);
+    } else {
+      LoadImmediate(dest, reinterpret_cast<uword>(table_ptr));
+      ldr(dest, Address(dest, 0));
+      AddImmediate(dest, class_offset);
+    }
   } else {
-    const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
-    LoadImmediate(dest, class_table->ClassStatsTableAddress());
-    ldr(dest, Address(dest, 0));
+    LoadIsolate(dest);
+    intptr_t table_offset =
+        Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid);
+    ldr(dest, Address(dest, table_offset));
     AddImmediate(dest, class_offset);
   }
 }
 
 
 void Assembler::MaybeTraceAllocation(intptr_t cid,
                                      Register temp_reg,
                                      Label* trace) {
   LoadAllocationStatsAddress(temp_reg, cid);
   const uword state_offset = ClassHeapStats::state_offset();
-  const Address& state_address = Address(temp_reg, state_offset);
-  ldr(temp_reg, state_address);
+  ldr(temp_reg, Address(temp_reg, state_offset));
   tst(temp_reg, Operand(ClassHeapStats::TraceAllocationMask()));
   b(trace, NE);
 }
 
 
 void Assembler::IncrementAllocationStats(Register stats_addr_reg,
                                          intptr_t cid,
                                          Heap::Space space) {
   ASSERT(stats_addr_reg != kNoRegister);
   ASSERT(stats_addr_reg != TMP);
   ASSERT(cid > 0);
   const uword count_field_offset = (space == Heap::kNew) ?
     ClassHeapStats::allocated_since_gc_new_space_offset() :
     ClassHeapStats::allocated_since_gc_old_space_offset();
   const Address& count_address = Address(stats_addr_reg, count_field_offset);
   ldr(TMP, count_address);
   AddImmediate(TMP, 1);
   str(TMP, count_address);
 }
 
 
 void Assembler::IncrementAllocationStatsWithSize(Register stats_addr_reg,
                                                  Register size_reg,
-                                                 intptr_t cid,
                                                  Heap::Space space) {
   ASSERT(stats_addr_reg != kNoRegister);
   ASSERT(stats_addr_reg != TMP);
-  ASSERT(cid > 0);
   const uword count_field_offset = (space == Heap::kNew) ?
     ClassHeapStats::allocated_since_gc_new_space_offset() :
     ClassHeapStats::allocated_since_gc_old_space_offset();
   const uword size_field_offset = (space == Heap::kNew) ?
     ClassHeapStats::allocated_size_since_gc_new_space_offset() :
     ClassHeapStats::allocated_size_since_gc_old_space_offset();
   const Address& count_address = Address(stats_addr_reg, count_field_offset);
   const Address& size_address = Address(stats_addr_reg, size_field_offset);
   ldr(TMP, count_address);
   AddImmediate(TMP, 1);
@@ skipping 95 matching lines @@
 
     // Initialize the tags.
     // instance: new object start as a tagged pointer.
     uword tags = 0;
     tags = RawObject::ClassIdTag::update(cid, tags);
     tags = RawObject::SizeTag::update(instance_size, tags);
     LoadImmediate(temp1, tags);
     str(temp1, FieldAddress(instance, Array::tags_offset()));  // Store tags.
 
     LoadImmediate(temp1, instance_size);
-    IncrementAllocationStatsWithSize(temp2, temp1, cid, space);
+    IncrementAllocationStatsWithSize(temp2, temp1, space);
   } else {
     b(failure);
   }
 }
 
 
 void Assembler::Stop(const char* message) {
   if (FLAG_print_stop_message) {
     StubCode* stub_code = Isolate::Current()->stub_code();
     PushList((1 << R0) | (1 << IP) | (1 << LR));  // Preserve R0, IP, LR.
@@ skipping 101 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM