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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
| 6 #if defined(TARGET_ARCH_X64) | 6 #if defined(TARGET_ARCH_X64) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
| 10 #include "vm/heap.h" | 10 #include "vm/heap.h" |
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| 3431 } | 3431 } |
| 3432 | 3432 |
| 3433 | 3433 |
| 3434 void Assembler::LeaveStubFrame() { | 3434 void Assembler::LeaveStubFrame() { |
| 3435 // Restore caller's PP register that was pushed in EnterStubFrame. | 3435 // Restore caller's PP register that was pushed in EnterStubFrame. |
| 3436 movq(PP, Address(RBP, (kSavedCallerPpSlotFromFp * kWordSize))); | 3436 movq(PP, Address(RBP, (kSavedCallerPpSlotFromFp * kWordSize))); |
| 3437 LeaveFrame(); | 3437 LeaveFrame(); |
| 3438 } | 3438 } |
| 3439 | 3439 |
| 3440 | 3440 |
| 3441 void Assembler::ComputeCounterAddressesForCid(intptr_t cid, | |
| 3442 Heap::Space space, | |
| 3443 Address* count_address, | |
| 3444 Address* size_address) { | |
| 3445 ASSERT(cid < kNumPredefinedCids); | |
| 3446 Register temp_reg = TMP; | |
| 3447 Isolate* isolate = Isolate::Current(); | |
| 3448 ClassTable* class_table = isolate->class_table(); | |
| 3449 const uword class_heap_stats_table_address = | |
| 3450 class_table->PredefinedClassHeapStatsTableAddress(); | |
| 3451 const uword class_offset = cid * sizeof(ClassHeapStats); // NOLINT | |
| 3452 const uword count_field_offset = (space == Heap::kNew) | |
| 3453 ? ClassHeapStats::allocated_since_gc_new_space_offset() | |
| 3454 : ClassHeapStats::allocated_since_gc_old_space_offset(); | |
| 3455 const uword size_field_offset = (space == Heap::kNew) | |
| 3456 ? ClassHeapStats::allocated_size_since_gc_new_space_offset() | |
| 3457 : ClassHeapStats::allocated_size_since_gc_old_space_offset(); | |
| 3458 movq(temp_reg, Immediate(class_heap_stats_table_address + class_offset)); | |
| 3459 *count_address = Address(temp_reg, count_field_offset); | |
| 3460 *size_address = Address(temp_reg, size_field_offset); | |
| 3461 } | |
| 3462 | |
| 3463 | |
| 3464 void Assembler::ComputeHeapStatsStateAddressForCid(intptr_t cid, | |
| 3465 Address* state_address) { | |
| 3466 ASSERT(cid < kNumPredefinedCids); | |
| 3467 Register temp_reg = TMP; | |
| 3468 Isolate* isolate = Isolate::Current(); | |
| 3469 ClassTable* class_table = isolate->class_table(); | |
| 3470 const uword class_heap_stats_table_address = | |
| 3471 class_table->PredefinedClassHeapStatsTableAddress(); | |
| 3472 const uword class_offset = cid * sizeof(ClassHeapStats); // NOLINT | |
| 3473 const uword state_offset = ClassHeapStats::state_offset(); | |
| 3474 movq(temp_reg, Immediate(class_heap_stats_table_address + | |
| 3475 class_offset + | |
| 3476 state_offset)); | |
| 3477 *state_address = Address(temp_reg, 0); | |
| 3478 } | |
| 3479 | |
| 3480 | |
| 3481 void Assembler::MaybeTraceAllocation(intptr_t cid, | 3441 void Assembler::MaybeTraceAllocation(intptr_t cid, |
| 3482 Label* trace, | 3442 Label* trace, |
| 3483 bool near_jump) { | 3443 bool near_jump) { |
| 3484 ASSERT(cid > 0); | 3444 ASSERT(cid > 0); |
| 3485 Address state_address(kNoRegister, 0); | 3445 intptr_t state_offset; |
| 3446 ClassTable* class_table = Isolate::Current()->class_table(); |
| 3447 ClassHeapStats** table_ptr = |
| 3448 class_table->StateAddressFor(cid, &state_offset); |
| 3449 Register temp_reg = TMP; |
| 3486 if (cid < kNumPredefinedCids) { | 3450 if (cid < kNumPredefinedCids) { |
| 3487 ComputeHeapStatsStateAddressForCid(cid, &state_address); | 3451 movq(temp_reg, Immediate(reinterpret_cast<uword>(*table_ptr))); |
| 3488 } else { | 3452 } else { |
| 3489 Register temp_reg = TMP; | 3453 Register temp_reg = TMP; |
| 3490 const uword class_offset = cid * sizeof(ClassHeapStats); // NOLINT | 3454 movq(temp_reg, Immediate(reinterpret_cast<uword>(table_ptr))); |
| 3491 const uword state_offset = ClassHeapStats::state_offset(); | 3455 movq(temp_reg, Address(temp_reg, 0)); |
| 3492 // temp_reg gets address of class table pointer. | |
| 3493 ClassTable* class_table = Isolate::Current()->class_table(); | |
| 3494 movq(temp_reg, Immediate(class_table->ClassStatsTableAddress())); | |
| 3495 state_address = Address(temp_reg, class_offset + state_offset); | |
| 3496 } | 3456 } |
| 3497 testb(state_address, Immediate(ClassHeapStats::TraceAllocationMask())); | 3457 testb(Address(temp_reg, state_offset), |
| 3458 Immediate(ClassHeapStats::TraceAllocationMask())); |
| 3498 // We are tracing for this class, jump to the trace label which will use | 3459 // We are tracing for this class, jump to the trace label which will use |
| 3499 // the allocation stub. | 3460 // the allocation stub. |
| 3500 j(NOT_ZERO, trace, near_jump); | 3461 j(NOT_ZERO, trace, near_jump); |
| 3501 } | 3462 } |
| 3502 | 3463 |
| 3503 | 3464 |
| 3504 void Assembler::UpdateAllocationStats(intptr_t cid, | 3465 ClassHeapStats** Assembler::UpdateAllocationStats(intptr_t cid, |
| 3505 Heap::Space space) { | 3466 Heap::Space space, |
| 3467 bool inline_isolate) { |
| 3506 ASSERT(cid > 0); | 3468 ASSERT(cid > 0); |
| 3507 if (cid < kNumPredefinedCids) { | 3469 intptr_t counter_offset; |
| 3508 Address count_address(kNoRegister, 0), size_address(kNoRegister, 0); | 3470 ClassTable* class_table = Isolate::Current()->class_table(); |
| 3509 ComputeCounterAddressesForCid(cid, space, &count_address, &size_address); | 3471 ClassHeapStats** table_ptr = class_table->CountAddressFor( |
| 3510 incq(count_address); | 3472 cid, space == Heap::kNew, &counter_offset); |
| 3473 Register temp_reg = TMP; |
| 3474 if (cid < kNumPredefinedCids && inline_isolate) { |
| 3475 movq(temp_reg, Immediate(reinterpret_cast<uword>(*table_ptr))); |
| 3511 } else { | 3476 } else { |
| 3512 Register temp_reg = TMP; | 3477 if (inline_isolate) { |
| 3513 const uword class_offset = cid * sizeof(ClassHeapStats); // NOLINT | 3478 movq(temp_reg, Immediate(reinterpret_cast<uword>(table_ptr))); |
| 3514 const uword count_field_offset = (space == Heap::kNew) | 3479 movq(temp_reg, Address(temp_reg, 0)); |
| 3515 ? ClassHeapStats::allocated_since_gc_new_space_offset() | 3480 } else { |
| 3516 : ClassHeapStats::allocated_since_gc_old_space_offset(); | 3481 LoadIsolate(temp_reg); |
| 3517 ClassTable* class_table = Isolate::Current()->class_table(); | 3482 intptr_t table_offset = |
| 3518 movq(temp_reg, Immediate(class_table->ClassStatsTableAddress())); | 3483 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); |
| 3519 movq(temp_reg, Address(temp_reg, 0)); | 3484 movq(temp_reg, Address(temp_reg, table_offset)); |
| 3520 incq(Address(temp_reg, class_offset + count_field_offset)); | 3485 } |
| 3521 } | 3486 } |
| 3487 incq(Address(temp_reg, counter_offset)); |
| 3488 return table_ptr; |
| 3522 } | 3489 } |
| 3523 | 3490 |
| 3524 | 3491 |
| 3525 void Assembler::UpdateAllocationStatsWithSize(intptr_t cid, | 3492 void Assembler::UpdateAllocationStatsWithSize(intptr_t cid, |
| 3526 Register size_reg, | 3493 Register size_reg, |
| 3527 Heap::Space space) { | 3494 Heap::Space space, |
| 3495 bool inline_isolate) { |
| 3528 ASSERT(cid > 0); | 3496 ASSERT(cid > 0); |
| 3529 ASSERT(cid < kNumPredefinedCids); | 3497 ASSERT(cid < kNumPredefinedCids); |
| 3530 Address count_address(kNoRegister, 0), size_address(kNoRegister, 0); | 3498 UpdateAllocationStats(cid, space, inline_isolate); |
| 3531 ComputeCounterAddressesForCid(cid, space, &count_address, &size_address); | 3499 Register temp_reg = TMP; |
| 3532 incq(count_address); | 3500 intptr_t size_offset = ClassTable::SizeOffsetFor(cid, space == Heap::kNew); |
| 3533 addq(size_address, size_reg); | 3501 addq(Address(temp_reg, size_offset), size_reg); |
| 3534 } | 3502 } |
| 3535 | 3503 |
| 3536 | 3504 |
| 3537 void Assembler::UpdateAllocationStatsWithSize(intptr_t cid, | 3505 void Assembler::UpdateAllocationStatsWithSize(intptr_t cid, |
| 3538 intptr_t size_in_bytes, | 3506 intptr_t size_in_bytes, |
| 3539 Heap::Space space) { | 3507 Heap::Space space, |
| 3508 bool inline_isolate) { |
| 3540 ASSERT(cid > 0); | 3509 ASSERT(cid > 0); |
| 3541 ASSERT(cid < kNumPredefinedCids); | 3510 ASSERT(cid < kNumPredefinedCids); |
| 3542 Address count_address(kNoRegister, 0), size_address(kNoRegister, 0); | 3511 UpdateAllocationStats(cid, space, inline_isolate); |
| 3543 ComputeCounterAddressesForCid(cid, space, &count_address, &size_address); | 3512 Register temp_reg = TMP; |
| 3544 incq(count_address); | 3513 intptr_t size_offset = ClassTable::SizeOffsetFor(cid, space == Heap::kNew); |
| 3545 addq(size_address, Immediate(size_in_bytes)); | 3514 addq(Address(temp_reg, size_offset), Immediate(size_in_bytes)); |
| 3546 } | 3515 } |
| 3547 | 3516 |
| 3548 | 3517 |
| 3549 void Assembler::TryAllocate(const Class& cls, | 3518 void Assembler::TryAllocate(const Class& cls, |
| 3550 Label* failure, | 3519 Label* failure, |
| 3551 bool near_jump, | 3520 bool near_jump, |
| 3552 Register instance_reg, | 3521 Register instance_reg, |
| 3553 Register pp) { | 3522 Register pp) { |
| 3554 ASSERT(failure != NULL); | 3523 ASSERT(failure != NULL); |
| 3555 if (FLAG_inline_alloc) { | 3524 if (FLAG_inline_alloc) { |
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| 3959 | 3928 |
| 3960 | 3929 |
| 3961 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3930 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3962 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); | 3931 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); |
| 3963 return xmm_reg_names[reg]; | 3932 return xmm_reg_names[reg]; |
| 3964 } | 3933 } |
| 3965 | 3934 |
| 3966 } // namespace dart | 3935 } // namespace dart |
| 3967 | 3936 |
| 3968 #endif // defined TARGET_ARCH_X64 | 3937 #endif // defined TARGET_ARCH_X64 |
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