Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(281)

Side by Side Diff: src/arm/simulator-arm.cc

Issue 12319113: Emit VMLS for multiply-subtract on ARM. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Address Ulan's commen Created 7 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/arm/lithium-codegen-arm.cc ('k') | test/cctest/test-assembler-arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 2765 matching lines...) Expand 10 before | Expand all | Expand 10 after
2776 } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) { 2776 } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
2777 // vmul 2777 // vmul
2778 if (instr->SzValue() != 0x1) { 2778 if (instr->SzValue() != 0x1) {
2779 UNREACHABLE(); // Not used by V8. 2779 UNREACHABLE(); // Not used by V8.
2780 } 2780 }
2781 2781
2782 double dn_value = get_double_from_d_register(vn); 2782 double dn_value = get_double_from_d_register(vn);
2783 double dm_value = get_double_from_d_register(vm); 2783 double dm_value = get_double_from_d_register(vm);
2784 double dd_value = dn_value * dm_value; 2784 double dd_value = dn_value * dm_value;
2785 set_d_register_from_double(vd, dd_value); 2785 set_d_register_from_double(vd, dd_value);
2786 } else if ((instr->Opc1Value() == 0x0) && !(instr->Opc3Value() & 0x1)) { 2786 } else if ((instr->Opc1Value() == 0x0)) {
2787 // vmla 2787 // vmla, vmls
2788 const bool is_vmls = (instr->Opc3Value() & 0x1);
2789
2788 if (instr->SzValue() != 0x1) { 2790 if (instr->SzValue() != 0x1) {
2789 UNREACHABLE(); // Not used by V8. 2791 UNREACHABLE(); // Not used by V8.
2790 } 2792 }
2791 2793
2792 double dd_value = get_double_from_d_register(vd); 2794 const double dd_val = get_double_from_d_register(vd);
2793 double dn_value = get_double_from_d_register(vn); 2795 const double dn_val = get_double_from_d_register(vn);
2794 double dm_value = get_double_from_d_register(vm); 2796 const double dm_val = get_double_from_d_register(vm);
2795 2797
2796 // Note: we do the mul and add in separate steps to avoid getting a result 2798 // Note: we do the mul and add/sub in separate steps to avoid getting a
2797 // with too high precision. 2799 // result with too high precision.
2798 set_d_register_from_double(vd, dn_value * dm_value); 2800 set_d_register_from_double(vd, dn_val * dm_val);
2799 set_d_register_from_double(vd, get_double_from_d_register(vd) + dd_value); 2801 if (is_vmls) {
2802 set_d_register_from_double(vd, dd_val - get_double_from_d_register(vd));
2803 } else {
2804 set_d_register_from_double(vd, dd_val + get_double_from_d_register(vd));
2805 }
2800 } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) { 2806 } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
2801 // vdiv 2807 // vdiv
2802 if (instr->SzValue() != 0x1) { 2808 if (instr->SzValue() != 0x1) {
2803 UNREACHABLE(); // Not used by V8. 2809 UNREACHABLE(); // Not used by V8.
2804 } 2810 }
2805 2811
2806 double dn_value = get_double_from_d_register(vn); 2812 double dn_value = get_double_from_d_register(vn);
2807 double dm_value = get_double_from_d_register(vm); 2813 double dm_value = get_double_from_d_register(vm);
2808 double dd_value = dn_value / dm_value; 2814 double dd_value = dn_value / dm_value;
2809 div_zero_vfp_flag_ = (dm_value == 0); 2815 div_zero_vfp_flag_ = (dm_value == 0);
(...skipping 650 matching lines...) Expand 10 before | Expand all | Expand 10 after
3460 uintptr_t address = *stack_slot; 3466 uintptr_t address = *stack_slot;
3461 set_register(sp, current_sp + sizeof(uintptr_t)); 3467 set_register(sp, current_sp + sizeof(uintptr_t));
3462 return address; 3468 return address;
3463 } 3469 }
3464 3470
3465 } } // namespace v8::internal 3471 } } // namespace v8::internal
3466 3472
3467 #endif // USE_SIMULATOR 3473 #endif // USE_SIMULATOR
3468 3474
3469 #endif // V8_TARGET_ARCH_ARM 3475 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « src/arm/lithium-codegen-arm.cc ('k') | test/cctest/test-assembler-arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698