Add uses to two ARM tables.

src/trusted/validator_arm/gen/arm32_decode_actuals_2.cc

 /*
  * Copyright 2013 The Native Client Authors.  All rights reserved.
  * Use of this source code is governed by a BSD-style license that can
  * be found in the LICENSE file.
  */
 
 // DO NOT EDIT: GENERATED CODE
 
 #include "native_client/src/trusted/validator_arm/inst_classes.h"
 #include "native_client/src/trusted/validator_arm/gen/arm32_decode_actuals.h"
@@ skipping 349 matching lines @@
 RegisterList Actual_VADD_integer_111100100dssnnnndddd1000nqm0mmmm_case_1::
 uses(Instruction inst) const {
   UNREFERENCED_PARAMETER(inst);  // To silence compiler.
   // uses: '{}'
   return RegisterList();
 }
 
 // Actual_VBIC_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1
 //
 // Actual:
-//   {safety: [inst(11:8)(0)=0 ||
+//   {defs: {},
+//    safety: [inst(11:8)(0)=0 ||
 //         inst(11:8)(3:2)=11 => DECODER_ERROR,
 //      inst(6)=1 &&
-//         inst(15:12)(0)=1 => UNDEFINED]}
+//         inst(15:12)(0)=1 => UNDEFINED],
+//    uses: {}}
+
+RegisterList Actual_VBIC_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1::
+defs(Instruction inst) const {
+  UNREFERENCED_PARAMETER(inst);  // To silence compiler.
+  // defs: '{}'
+  return RegisterList();
+}
 
 SafetyLevel Actual_VBIC_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1::
 safety(Instruction inst) const {
   UNREFERENCED_PARAMETER(inst);  // To silence compiler.
 
   // inst(11:8)(0)=0 ||
   //       inst(11:8)(3:2)=11 => DECODER_ERROR
   if (((((inst.Bits() & 0x00000F00) >> 8) & 0x00000001)  ==
           0x00000000) ||
        ((((inst.Bits() & 0x00000F00) >> 8) & 0x0000000C)  ==
           0x0000000C))
     return DECODER_ERROR;
 
   // inst(6)=1 &&
   //       inst(15:12)(0)=1 => UNDEFINED
   if (((inst.Bits() & 0x00000040)  ==
           0x00000040) &&
        ((((inst.Bits() & 0x0000F000) >> 12) & 0x00000001)  ==
           0x00000001))
     return UNDEFINED;
 
   return MAY_BE_SAFE;
 }
 
 
+RegisterList Actual_VBIC_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1::
+uses(Instruction inst) const {
+  UNREFERENCED_PARAMETER(inst);  // To silence compiler.
+  // uses: '{}'
+  return RegisterList();
+}
+
 // Actual_VCNT_111100111d11ss00dddd01010qm0mmmm_case_1
 //
 // Actual:
 //   {defs: {},
 //    safety: [inst(19:18)=~00 => UNDEFINED,
 //      inst(6)=1 &&
 //         (inst(15:12)(0)=1 ||
 //         inst(3:0)(0)=1) => UNDEFINED],
 //    uses: {}}
 
@@ skipping 2582 matching lines @@
           0x00100000
        ? RegisterList()
        : RegisterList().
    Add(Register(((inst.Bits() & 0x0000F000) >> 12))).
    Add(Register(((inst.Bits() & 0x000F0000) >> 16))));
 }
 
 // Actual_VMOV_immediate_A1_1111001m1d000mmmddddcccc0qp1mmmm_case_1
 //
 // Actual:
-//   {safety: [inst(5)=0 &&
+//   {defs: {},
+//    safety: [inst(5)=0 &&
 //         inst(11:8)(0)=1 &&
 //         inst(11:8)(3:2)=~11 => DECODER_ERROR,
 //      inst(5)=1 &&
 //         inst(11:8)=~1110 => DECODER_ERROR,
 //      inst(6)=1 &&
-//         inst(15:12)(0)=1 => UNDEFINED]}
+//         inst(15:12)(0)=1 => UNDEFINED],
+//    uses: {}}
+
+RegisterList Actual_VMOV_immediate_A1_1111001m1d000mmmddddcccc0qp1mmmm_case_1::
+defs(Instruction inst) const {
+  UNREFERENCED_PARAMETER(inst);  // To silence compiler.
+  // defs: '{}'
+  return RegisterList();
+}
 
 SafetyLevel Actual_VMOV_immediate_A1_1111001m1d000mmmddddcccc0qp1mmmm_case_1::
 safety(Instruction inst) const {
   UNREFERENCED_PARAMETER(inst);  // To silence compiler.
 
   // inst(5)=0 &&
   //       inst(11:8)(0)=1 &&
   //       inst(11:8)(3:2)=~11 => DECODER_ERROR
   if (((inst.Bits() & 0x00000020)  ==
           0x00000000) &&
@@ skipping 16 matching lines @@
   if (((inst.Bits() & 0x00000040)  ==
           0x00000040) &&
        ((((inst.Bits() & 0x0000F000) >> 12) & 0x00000001)  ==
           0x00000001))
     return UNDEFINED;
 
   return MAY_BE_SAFE;
 }
 
 
+RegisterList Actual_VMOV_immediate_A1_1111001m1d000mmmddddcccc0qp1mmmm_case_1::
+uses(Instruction inst) const {
+  UNREFERENCED_PARAMETER(inst);  // To silence compiler.
+  // uses: '{}'
+  return RegisterList();
+}
+
 // Actual_VMRS_cccc111011110001tttt101000010000_case_1
 //
 // Actual:
 //   {defs: {16
 //         if 15  ==
 //            inst(15:12)
 //         else inst(15:12)}}
 
 RegisterList Actual_VMRS_cccc111011110001tttt101000010000_case_1::
 defs(Instruction inst) const {
@@ skipping 150 matching lines @@
 RegisterList Actual_VMUL_polynomial_A1_1111001u0dssnnnndddd1001nqm1mmmm_case_1::
 uses(Instruction inst) const {
   UNREFERENCED_PARAMETER(inst);  // To silence compiler.
   // uses: '{}'
   return RegisterList();
 }
 
 // Actual_VMVN_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1
 //
 // Actual:
-//   {safety: [(inst(11:8)(0)=1 &&
+//   {defs: {},
+//    safety: [(inst(11:8)(0)=1 &&
 //         inst(11:8)(3:2)=~11) ||
 //         inst(11:8)(3:1)=111 => DECODER_ERROR,
 //      inst(6)=1 &&
-//         inst(15:12)(0)=1 => UNDEFINED]}
+//         inst(15:12)(0)=1 => UNDEFINED],
+//    uses: {}}
+
+RegisterList Actual_VMVN_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1::
+defs(Instruction inst) const {
+  UNREFERENCED_PARAMETER(inst);  // To silence compiler.
+  // defs: '{}'
+  return RegisterList();
+}
 
 SafetyLevel Actual_VMVN_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1::
 safety(Instruction inst) const {
   UNREFERENCED_PARAMETER(inst);  // To silence compiler.
 
   // (inst(11:8)(0)=1 &&
   //       inst(11:8)(3:2)=~11) ||
   //       inst(11:8)(3:1)=111 => DECODER_ERROR
   if (((((((inst.Bits() & 0x00000F00) >> 8) & 0x00000001)  ==
           0x00000001) &&
        ((((inst.Bits() & 0x00000F00) >> 8) & 0x0000000C)  !=
           0x0000000C))) ||
        ((((inst.Bits() & 0x00000F00) >> 8) & 0x0000000E)  ==
           0x0000000E))
     return DECODER_ERROR;
 
   // inst(6)=1 &&
   //       inst(15:12)(0)=1 => UNDEFINED
   if (((inst.Bits() & 0x00000040)  ==
           0x00000040) &&
        ((((inst.Bits() & 0x0000F000) >> 12) & 0x00000001)  ==
           0x00000001))
     return UNDEFINED;
 
   return MAY_BE_SAFE;
 }
 
 
+RegisterList Actual_VMVN_immediate_1111001i1d000mmmddddcccc0q11mmmm_case_1::
+uses(Instruction inst) const {
+  UNREFERENCED_PARAMETER(inst);  // To silence compiler.
+  // uses: '{}'
+  return RegisterList();
+}
+
 // Actual_VPADD_floating_point_111100110d0snnnndddd1101nqm0mmmm_case_1
 //
 // Actual:
 //   {defs: {},
 //    safety: [inst(21:20)(0)=1 ||
 //         inst(6)=1 => UNDEFINED],
 //    uses: {}}
 
 RegisterList Actual_VPADD_floating_point_111100110d0snnnndddd1101nqm0mmmm_case_1::
 defs(Instruction inst) const {
@@ skipping 1131 matching lines @@
 
 
 RegisterList Actual_VUZP_111100111d11ss10dddd00010qm0mmmm_case_1::
 uses(Instruction inst) const {
   UNREFERENCED_PARAMETER(inst);  // To silence compiler.
   // uses: '{}'
   return RegisterList();
 }
 
 }  // namespace nacl_arm_dec