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Issue 12217014: ARM: Try to avoid VMSR instruction and drop redundant VCVT (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Address Rodolph's comments Created 7 years, 10 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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453 Register dst2, 453 Register dst2,
454 const MemOperand& src, 454 const MemOperand& src,
455 Condition cond = al); 455 Condition cond = al);
456 456
457 // Store two consecutive registers to two consecutive memory locations. 457 // Store two consecutive registers to two consecutive memory locations.
458 void Strd(Register src1, 458 void Strd(Register src1,
459 Register src2, 459 Register src2,
460 const MemOperand& dst, 460 const MemOperand& dst,
461 Condition cond = al); 461 Condition cond = al);
462 462
463 // Clear specified FPSCR bits.
464 void ClearFPSCRBits(const uint32_t bits_to_clear,
465 const Register scratch,
466 const Condition cond = al);
467
468 // Compare double values and move the result to the normal condition flags. 463 // Compare double values and move the result to the normal condition flags.
469 void VFPCompareAndSetFlags(const DwVfpRegister src1, 464 void VFPCompareAndSetFlags(const DwVfpRegister src1,
470 const DwVfpRegister src2, 465 const DwVfpRegister src2,
471 const Condition cond = al); 466 const Condition cond = al);
472 void VFPCompareAndSetFlags(const DwVfpRegister src1, 467 void VFPCompareAndSetFlags(const DwVfpRegister src1,
473 const double src2, 468 const double src2,
474 const Condition cond = al); 469 const Condition cond = al);
475 470
476 // Compare double values and then load the fpscr flags to a register. 471 // Compare double values and then load the fpscr flags to a register.
477 void VFPCompareAndLoadFlags(const DwVfpRegister src1, 472 void VFPCompareAndLoadFlags(const DwVfpRegister src1,
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1432 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1427 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1433 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1428 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1434 #else 1429 #else
1435 #define ACCESS_MASM(masm) masm-> 1430 #define ACCESS_MASM(masm) masm->
1436 #endif 1431 #endif
1437 1432
1438 1433
1439 } } // namespace v8::internal 1434 } } // namespace v8::internal
1440 1435
1441 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ 1436 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_
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