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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_ASSEMBLER_MIPS_H_ | 5 #ifndef VM_ASSEMBLER_MIPS_H_ |
6 #define VM_ASSEMBLER_MIPS_H_ | 6 #define VM_ASSEMBLER_MIPS_H_ |
7 | 7 |
8 #ifndef VM_ASSEMBLER_H_ | 8 #ifndef VM_ASSEMBLER_H_ |
9 #error Do not include assembler_mips.h directly; use assembler.h instead. | 9 #error Do not include assembler_mips.h directly; use assembler.h instead. |
10 #endif | 10 #endif |
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281 void set_use_far_branches(bool b) { | 281 void set_use_far_branches(bool b) { |
282 ASSERT(buffer_.Size() == 0); | 282 ASSERT(buffer_.Size() == 0); |
283 use_far_branches_ = b; | 283 use_far_branches_ = b; |
284 } | 284 } |
285 | 285 |
286 void EnterFrame(); | 286 void EnterFrame(); |
287 void LeaveFrameAndReturn(); | 287 void LeaveFrameAndReturn(); |
288 | 288 |
289 // Set up a stub frame so that the stack traversal code can easily identify | 289 // Set up a stub frame so that the stack traversal code can easily identify |
290 // a stub frame. | 290 // a stub frame. |
291 void EnterStubFrame(); | 291 void EnterStubFrame(intptr_t frame_size = 0); |
292 void LeaveStubFrame(); | 292 void LeaveStubFrame(); |
293 // A separate macro for when a Ret immediately follows, so that we can use | 293 // A separate macro for when a Ret immediately follows, so that we can use |
294 // the branch delay slot. | 294 // the branch delay slot. |
295 void LeaveStubFrameAndReturn(Register ra = RA); | 295 void LeaveStubFrameAndReturn(Register ra = RA); |
296 | 296 |
297 // Instruction pattern from entrypoint is used in dart frame prologs | |
298 // to set up the frame and save a PC which can be used to figure out the | |
299 // RawInstruction object corresponding to the code running in the frame. | |
300 // See EnterDartFrame. There are 6 instructions before we know the PC. | |
301 static const intptr_t kEntryPointToPcMarkerOffset = 6 * Instr::kInstrSize; | |
302 static intptr_t EntryPointToPcMarkerOffset() { | |
303 return kEntryPointToPcMarkerOffset; | |
304 } | |
305 | |
306 void UpdateAllocationStats(intptr_t cid, | 297 void UpdateAllocationStats(intptr_t cid, |
307 Register temp_reg, | 298 Register temp_reg, |
308 Heap::Space space, | 299 Heap::Space space, |
309 bool inline_isolate = true); | 300 bool inline_isolate = true); |
310 | 301 |
311 void UpdateAllocationStatsWithSize(intptr_t cid, | 302 void UpdateAllocationStatsWithSize(intptr_t cid, |
312 Register size_reg, | 303 Register size_reg, |
313 Register temp_reg, | 304 Register temp_reg, |
314 Heap::Space space, | 305 Heap::Space space, |
315 bool inline_isolate = true); | 306 bool inline_isolate = true); |
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905 | 896 |
906 // ro must be different from rd and rs. | 897 // ro must be different from rd and rs. |
907 // None of rd, rs, rt, or ro may be TMP. | 898 // None of rd, rs, rt, or ro may be TMP. |
908 void SubImmediateDetectOverflow(Register rd, Register rs, int32_t imm, | 899 void SubImmediateDetectOverflow(Register rd, Register rs, int32_t imm, |
909 Register ro) { | 900 Register ro) { |
910 ASSERT(!in_delay_slot_); | 901 ASSERT(!in_delay_slot_); |
911 LoadImmediate(rd, imm); | 902 LoadImmediate(rd, imm); |
912 SubuDetectOverflow(rd, rs, rd, ro); | 903 SubuDetectOverflow(rd, rs, rd, ro); |
913 } | 904 } |
914 | 905 |
915 void Branch(const StubEntry& stub_entry); | 906 void Branch(const StubEntry& stub_entry, Register pp = PP); |
916 | 907 |
917 void BranchPatchable(const StubEntry& stub_entry); | |
918 | |
919 void BranchLink(const ExternalLabel* label, Patchability patchable); | |
rmacnak
2015/09/15 23:05:41
Still used in unsimulated MIPS
runtime/vm/stub_c
Florian Schneider
2015/09/16 10:36:45
Done.
| |
920 void BranchLink(const StubEntry& stub_entry, | 908 void BranchLink(const StubEntry& stub_entry, |
921 Patchability patchable = kNotPatchable); | 909 Patchability patchable = kNotPatchable); |
922 | 910 |
923 void BranchLinkPatchable(const StubEntry& stub_entry); | 911 void BranchLinkPatchable(const StubEntry& stub_entry); |
924 | 912 |
925 void Drop(intptr_t stack_elements) { | 913 void Drop(intptr_t stack_elements) { |
926 ASSERT(stack_elements >= 0); | 914 ASSERT(stack_elements >= 0); |
927 if (stack_elements > 0) { | 915 if (stack_elements > 0) { |
928 addiu(SP, SP, Immediate(stack_elements * kWordSize)); | 916 addiu(SP, SP, Immediate(stack_elements * kWordSize)); |
929 } | 917 } |
930 } | 918 } |
931 | 919 |
932 void LoadPoolPointer() { | 920 void LoadPoolPointer(Register reg = PP) { |
933 ASSERT(!in_delay_slot_); | 921 ASSERT(!in_delay_slot_); |
934 GetNextPC(TMP); // TMP gets the address of the next instruction. | 922 CheckCodePointer(); |
935 const intptr_t object_pool_pc_dist = | 923 lw(reg, FieldAddress(CODE_REG, Code::object_pool_offset())); |
936 Instructions::HeaderSize() - Instructions::object_pool_offset() + | 924 set_constant_pool_allowed(reg == PP); |
937 CodeSize(); | |
938 lw(PP, Address(TMP, -object_pool_pc_dist)); | |
939 } | 925 } |
940 | 926 |
927 void CheckCodePointer(); | |
928 | |
929 void RestoreCodePointer(); | |
930 | |
941 void LoadImmediate(Register rd, int32_t value) { | 931 void LoadImmediate(Register rd, int32_t value) { |
942 ASSERT(!in_delay_slot_); | 932 ASSERT(!in_delay_slot_); |
943 if (Utils::IsInt(kImmBits, value)) { | 933 if (Utils::IsInt(kImmBits, value)) { |
944 addiu(rd, ZR, Immediate(value)); | 934 addiu(rd, ZR, Immediate(value)); |
945 } else { | 935 } else { |
946 const uint16_t low = Utils::Low16Bits(value); | 936 const uint16_t low = Utils::Low16Bits(value); |
947 const uint16_t high = Utils::High16Bits(value); | 937 const uint16_t high = Utils::High16Bits(value); |
948 lui(rd, Immediate(high)); | 938 lui(rd, Immediate(high)); |
949 if (low != 0) { | 939 if (low != 0) { |
950 ori(rd, rd, Immediate(low)); | 940 ori(rd, rd, Immediate(low)); |
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1511 void GetNextPC(Register dest, Register temp = kNoRegister); | 1501 void GetNextPC(Register dest, Register temp = kNoRegister); |
1512 | 1502 |
1513 void ReserveAlignedFrameSpace(intptr_t frame_space); | 1503 void ReserveAlignedFrameSpace(intptr_t frame_space); |
1514 | 1504 |
1515 // Create a frame for calling into runtime that preserves all volatile | 1505 // Create a frame for calling into runtime that preserves all volatile |
1516 // registers. Frame's SP is guaranteed to be correctly aligned and | 1506 // registers. Frame's SP is guaranteed to be correctly aligned and |
1517 // frame_space bytes are reserved under it. | 1507 // frame_space bytes are reserved under it. |
1518 void EnterCallRuntimeFrame(intptr_t frame_space); | 1508 void EnterCallRuntimeFrame(intptr_t frame_space); |
1519 void LeaveCallRuntimeFrame(); | 1509 void LeaveCallRuntimeFrame(); |
1520 | 1510 |
1521 void LoadWordFromPoolOffset(Register rd, int32_t offset); | |
1522 void LoadObject(Register rd, const Object& object); | 1511 void LoadObject(Register rd, const Object& object); |
1523 void LoadUniqueObject(Register rd, const Object& object); | 1512 void LoadUniqueObject(Register rd, const Object& object); |
1524 void LoadExternalLabel(Register rd, | 1513 void LoadExternalLabel(Register rd, |
1525 const ExternalLabel* label, | 1514 const ExternalLabel* label, |
1526 Patchability patchable); | 1515 Patchability patchable); |
1516 void LoadFunctionFromCalleePool(Register dst, | |
1517 const Function& function, | |
1518 Register new_pp); | |
1527 void LoadNativeEntry(Register rd, | 1519 void LoadNativeEntry(Register rd, |
1528 const ExternalLabel* label, | 1520 const ExternalLabel* label, |
1529 Patchability patchable); | 1521 Patchability patchable); |
1530 void PushObject(const Object& object); | 1522 void PushObject(const Object& object); |
1531 | 1523 |
1532 void LoadIsolate(Register result); | 1524 void LoadIsolate(Register result); |
1533 | 1525 |
1534 void LoadClassId(Register result, Register object); | 1526 void LoadClassId(Register result, Register object); |
1535 void LoadClassById(Register result, Register class_id); | 1527 void LoadClassById(Register result, Register class_id); |
1536 void LoadClass(Register result, Register object); | 1528 void LoadClass(Register result, Register object); |
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1568 void StoreIntoObjectNoBarrierOffset(Register object, | 1560 void StoreIntoObjectNoBarrierOffset(Register object, |
1569 int32_t offset, | 1561 int32_t offset, |
1570 const Object& value); | 1562 const Object& value); |
1571 | 1563 |
1572 void CallRuntime(const RuntimeEntry& entry, intptr_t argument_count); | 1564 void CallRuntime(const RuntimeEntry& entry, intptr_t argument_count); |
1573 | 1565 |
1574 // Set up a Dart frame on entry with a frame pointer and PC information to | 1566 // Set up a Dart frame on entry with a frame pointer and PC information to |
1575 // enable easy access to the RawInstruction object of code corresponding | 1567 // enable easy access to the RawInstruction object of code corresponding |
1576 // to this frame. | 1568 // to this frame. |
1577 void EnterDartFrame(intptr_t frame_size); | 1569 void EnterDartFrame(intptr_t frame_size); |
1578 void LeaveDartFrame(); | 1570 void LeaveDartFrame(RestorePP restore_pp = kRestoreCallerPP); |
1579 void LeaveDartFrameAndReturn(); | 1571 void LeaveDartFrameAndReturn(Register ra = RA); |
1580 | 1572 |
1581 // Set up a Dart frame for a function compiled for on-stack replacement. | 1573 // Set up a Dart frame for a function compiled for on-stack replacement. |
1582 // The frame layout is a normal Dart frame, but the frame is partially set | 1574 // The frame layout is a normal Dart frame, but the frame is partially set |
1583 // up on entry (it is the frame of the unoptimized code). | 1575 // up on entry (it is the frame of the unoptimized code). |
1584 void EnterOsrFrame(intptr_t extra_size); | 1576 void EnterOsrFrame(intptr_t extra_size); |
1585 | 1577 |
1586 Address ElementAddressForIntIndex(bool is_external, | 1578 Address ElementAddressForIntIndex(bool is_external, |
1587 intptr_t cid, | 1579 intptr_t cid, |
1588 intptr_t index_scale, | 1580 intptr_t index_scale, |
1589 Register array, | 1581 Register array, |
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1630 const String& comment_; | 1622 const String& comment_; |
1631 | 1623 |
1632 DISALLOW_COPY_AND_ASSIGN(CodeComment); | 1624 DISALLOW_COPY_AND_ASSIGN(CodeComment); |
1633 }; | 1625 }; |
1634 | 1626 |
1635 GrowableArray<CodeComment*> comments_; | 1627 GrowableArray<CodeComment*> comments_; |
1636 | 1628 |
1637 bool constant_pool_allowed_; | 1629 bool constant_pool_allowed_; |
1638 | 1630 |
1639 void BranchLink(const ExternalLabel* label); | 1631 void BranchLink(const ExternalLabel* label); |
1632 void BranchLink(const Code& code, Patchability patchable); | |
1640 | 1633 |
1634 void LoadWordFromPoolOffset(Register rd, int32_t offset, Register pp = PP); | |
1641 void LoadObjectHelper(Register rd, const Object& object, bool is_unique); | 1635 void LoadObjectHelper(Register rd, const Object& object, bool is_unique); |
1642 | 1636 |
1643 void Emit(int32_t value) { | 1637 void Emit(int32_t value) { |
1644 // Emitting an instruction clears the delay slot state. | 1638 // Emitting an instruction clears the delay slot state. |
1645 in_delay_slot_ = false; | 1639 in_delay_slot_ = false; |
1646 delay_slot_available_ = false; | 1640 delay_slot_available_ = false; |
1647 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 1641 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
1648 buffer_.Emit<int32_t>(value); | 1642 buffer_.Emit<int32_t>(value); |
1649 } | 1643 } |
1650 | 1644 |
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1739 Register value, | 1733 Register value, |
1740 Label* no_update); | 1734 Label* no_update); |
1741 | 1735 |
1742 DISALLOW_ALLOCATION(); | 1736 DISALLOW_ALLOCATION(); |
1743 DISALLOW_COPY_AND_ASSIGN(Assembler); | 1737 DISALLOW_COPY_AND_ASSIGN(Assembler); |
1744 }; | 1738 }; |
1745 | 1739 |
1746 } // namespace dart | 1740 } // namespace dart |
1747 | 1741 |
1748 #endif // VM_ASSEMBLER_MIPS_H_ | 1742 #endif // VM_ASSEMBLER_MIPS_H_ |
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