VM: New calling convention for generated code.

runtime/vm/assembler_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_MIPS_H_
 #define VM_ASSEMBLER_MIPS_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_mips.h directly; use assembler.h instead.
 #endif
@@ skipping 270 matching lines @@
   void set_use_far_branches(bool b) {
     ASSERT(buffer_.Size() == 0);
     use_far_branches_ = b;
   }
 
   void EnterFrame();
   void LeaveFrameAndReturn();
 
   // Set up a stub frame so that the stack traversal code can easily identify
   // a stub frame.
-  void EnterStubFrame();
+  void EnterStubFrame(intptr_t frame_size = 0);
   void LeaveStubFrame();
   // A separate macro for when a Ret immediately follows, so that we can use
   // the branch delay slot.
   void LeaveStubFrameAndReturn(Register ra = RA);
 
-  // Instruction pattern from entrypoint is used in dart frame prologs
-  // to set up the frame and save a PC which can be used to figure out the
-  // RawInstruction object corresponding to the code running in the frame.
-  // See EnterDartFrame. There are 6 instructions before we know the PC.
-  static const intptr_t kEntryPointToPcMarkerOffset = 6 * Instr::kInstrSize;
-  static intptr_t EntryPointToPcMarkerOffset() {
-    return kEntryPointToPcMarkerOffset;
-  }
-
   void UpdateAllocationStats(intptr_t cid,
                              Register temp_reg,
                              Heap::Space space,
                              bool inline_isolate = true);
 
   void UpdateAllocationStatsWithSize(intptr_t cid,
                                      Register size_reg,
                                      Register temp_reg,
                                      Heap::Space space,
                                      bool inline_isolate = true);
@@ skipping 589 matching lines @@
 
   // ro must be different from rd and rs.
   // None of rd, rs, rt, or ro may be TMP.
   void SubImmediateDetectOverflow(Register rd, Register rs, int32_t imm,
                                   Register ro) {
     ASSERT(!in_delay_slot_);
     LoadImmediate(rd, imm);
     SubuDetectOverflow(rd, rs, rd, ro);
   }
 
-  void Branch(const StubEntry& stub_entry);
+  void Branch(const StubEntry& stub_entry, Register pp = PP);
 
-  void BranchPatchable(const StubEntry& stub_entry);
-
-  void BranchLink(const ExternalLabel* label, Patchability patchable);
   void BranchLink(const StubEntry& stub_entry,
                   Patchability patchable = kNotPatchable);
 
   void BranchLinkPatchable(const StubEntry& stub_entry);
 
   void Drop(intptr_t stack_elements) {
     ASSERT(stack_elements >= 0);
     if (stack_elements > 0) {
       addiu(SP, SP, Immediate(stack_elements * kWordSize));
     }
   }
 
-  void LoadPoolPointer() {
+  void LoadPoolPointer(Register reg = PP) {
     ASSERT(!in_delay_slot_);
-    GetNextPC(TMP);  // TMP gets the address of the next instruction.
-    const intptr_t object_pool_pc_dist =
-        Instructions::HeaderSize() - Instructions::object_pool_offset() +
-        CodeSize();
-    lw(PP, Address(TMP, -object_pool_pc_dist));
+    CheckCodePointer();
+    lw(reg, FieldAddress(CODE_REG, Code::object_pool_offset()));
+    set_constant_pool_allowed(reg == PP);
   }
 
+  void CheckCodePointer();
+
+  void RestoreCodePointer();
+
   void LoadImmediate(Register rd, int32_t value) {
     ASSERT(!in_delay_slot_);
     if (Utils::IsInt(kImmBits, value)) {
       addiu(rd, ZR, Immediate(value));
     } else {
       const uint16_t low = Utils::Low16Bits(value);
       const uint16_t high = Utils::High16Bits(value);
       lui(rd, Immediate(high));
       if (low != 0) {
         ori(rd, rd, Immediate(low));
@@ skipping 560 matching lines @@
   void GetNextPC(Register dest, Register temp = kNoRegister);
 
   void ReserveAlignedFrameSpace(intptr_t frame_space);
 
   // Create a frame for calling into runtime that preserves all volatile
   // registers.  Frame's SP is guaranteed to be correctly aligned and
   // frame_space bytes are reserved under it.
   void EnterCallRuntimeFrame(intptr_t frame_space);
   void LeaveCallRuntimeFrame();
 
-  void LoadWordFromPoolOffset(Register rd, int32_t offset);
   void LoadObject(Register rd, const Object& object);
   void LoadUniqueObject(Register rd, const Object& object);
   void LoadExternalLabel(Register rd,
                          const ExternalLabel* label,
                          Patchability patchable);
+  void LoadFunctionFromCalleePool(Register dst,
+                                  const Function& function,
+                                  Register new_pp);
   void PushObject(const Object& object);
 
   void LoadIsolate(Register result);
 
   void LoadClassId(Register result, Register object);
   void LoadClassById(Register result, Register class_id);
   void LoadClass(Register result, Register object);
   void LoadClassIdMayBeSmi(Register result, Register object);
   void LoadTaggedClassIdMayBeSmi(Register result, Register object);
 
@@ skipping 28 matching lines @@
   void StoreIntoObjectNoBarrierOffset(Register object,
                                       int32_t offset,
                                       const Object& value);
 
   void CallRuntime(const RuntimeEntry& entry, intptr_t argument_count);
 
   // Set up a Dart frame on entry with a frame pointer and PC information to
   // enable easy access to the RawInstruction object of code corresponding
   // to this frame.
   void EnterDartFrame(intptr_t frame_size);
-  void LeaveDartFrame();
-  void LeaveDartFrameAndReturn();
+  void LeaveDartFrame(RestorePP restore_pp = kRestoreCallerPP);
+  void LeaveDartFrameAndReturn(Register ra = RA);
 
   // Set up a Dart frame for a function compiled for on-stack replacement.
   // The frame layout is a normal Dart frame, but the frame is partially set
   // up on entry (it is the frame of the unoptimized code).
   void EnterOsrFrame(intptr_t extra_size);
 
   Address ElementAddressForIntIndex(bool is_external,
                                     intptr_t cid,
                                     intptr_t index_scale,
                                     Register array,
@@ skipping 40 matching lines @@
     const String& comment_;
 
     DISALLOW_COPY_AND_ASSIGN(CodeComment);
   };
 
   GrowableArray<CodeComment*> comments_;
 
   bool constant_pool_allowed_;
 
   void BranchLink(const ExternalLabel* label);
+  void BranchLink(const Code& code, Patchability patchable);
 
+  void LoadWordFromPoolOffset(Register rd, int32_t offset, Register pp = PP);
   void LoadObjectHelper(Register rd, const Object& object, bool is_unique);
 
   void Emit(int32_t value) {
     // Emitting an instruction clears the delay slot state.
     in_delay_slot_ = false;
     delay_slot_available_ = false;
     AssemblerBuffer::EnsureCapacity ensured(&buffer_);
     buffer_.Emit<int32_t>(value);
   }
 
@@ skipping 88 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_MIPS_H_