VM: New calling convention for generated code.

runtime/vm/assembler_ia32.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_IA32)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/cpu.h"
@@ skipping 2348 matching lines @@
   } else {
     StoreIntoObjectFilterNoSmi(object, value, &done);
   }
   // A store buffer update is required.
   if (value != EDX) {
     pushl(EDX);  // Preserve EDX.
   }
   if (object != EDX) {
     movl(EDX, object);
   }
-  Call(*StubCode::UpdateStoreBuffer_entry());
+  call(Address(THR, Thread::update_store_buffer_entry_point_offset()));
   if (value != EDX) {
     popl(EDX);  // Restore EDX.
   }
   Bind(&done);
 }
 
 
 void Assembler::StoreIntoObjectNoBarrier(Register object,
                                          const Address& dest,
                                          Register value,
@@ skipping 235 matching lines @@
 }
 
 
 void Assembler::CallRuntime(const RuntimeEntry& entry,
                             intptr_t argument_count) {
   entry.Call(this, argument_count);
 }
 
 
 void Assembler::Call(const StubEntry& stub_entry) {
-  const ExternalLabel label(stub_entry.EntryPoint());
-  call(&label);
+  const Code& target = Code::ZoneHandle(stub_entry.code());
+  LoadObject(CODE_REG, target);

[rmacnak, 2015/09/12 23:12:44]

Can't this just be call the entry point as before? On IA32 saving the PC-marker
is a push-immediate and there is no pool pointer to load, so there is no reason
to setup CODE_REG right?

[Florian Schneider, 2015/09/14 11:15:15]

Possibly - as it is now, patching the entry (CodePatcher::PatchEntry) is done by
just changing the instructions in the code object - therefore, the indirect
call.

We may be able to improve this - but I think it would require quite a bit of
additional ia32-specific code.

For now I wanted to avoid adding too much ia32-specific code. Let's check how
large the performance impact of this pattern is before deciding on the final
implementation.

+  call(FieldAddress(CODE_REG, Code::entry_point_offset()));
 }
 
 
 void Assembler::Jmp(const StubEntry& stub_entry) {
   const ExternalLabel label(stub_entry.EntryPoint());
   jmp(&label);
 }
 
 
 void Assembler::J(Condition condition, const StubEntry& stub_entry) {
@@ skipping 225 matching lines @@
     uword tags = 0;
     tags = RawObject::ClassIdTag::update(cid, tags);
     tags = RawObject::SizeTag::update(instance_size, tags);
     movl(FieldAddress(instance, Object::tags_offset()), Immediate(tags));
   } else {
     jmp(failure);
   }
 }
 
 
+void Assembler::PushCodeObject() {
+  ASSERT(code_.IsNotTemporaryScopedHandle());
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x68);
+  buffer_.EmitObject(code_);
+}
+
+
 void Assembler::EnterDartFrame(intptr_t frame_size) {
   EnterFrame(0);
-  Label dart_entry;
-  call(&dart_entry);
-  Bind(&dart_entry);
-  // The runtime system assumes that the code marker address is
-  // kEntryPointToPcMarkerOffset bytes from the entry.  If there is any code
-  // generated before entering the frame, the address needs to be adjusted.
-  const intptr_t offset = EntryPointToPcMarkerOffset() - CodeSize();
-  if (offset != 0) {
-    addl(Address(ESP, 0), Immediate(offset));
-  }
+
+  PushCodeObject();
+
   if (frame_size != 0) {
     subl(ESP, Immediate(frame_size));
   }
 }
 
 
 // On entry to a function compiled for OSR, the caller's frame pointer, the
 // stack locals, and any copied parameters are already in place.  The frame
-// pointer is already set up.  The PC marker is not correct for the
-// optimized function and there may be extra space for spill slots to
+// pointer is already set up. There may be extra space for spill slots to
 // allocate.
 void Assembler::EnterOsrFrame(intptr_t extra_size) {
   Comment("EnterOsrFrame");
   if (prologue_offset_ == -1) {
     Comment("PrologueOffset = %" Pd "", CodeSize());
     prologue_offset_ = CodeSize();
   }
-  Label dart_entry;
-  call(&dart_entry);
-  Bind(&dart_entry);
-  // The runtime system assumes that the code marker address is
-  // kEntryPointToPcMarkerOffset bytes from the entry.  Since there is no
-  // code to set up the frame pointer, the address needs to be adjusted.
-  const intptr_t offset = EntryPointToPcMarkerOffset() - CodeSize();
-  if (offset != 0) {
-    addl(Address(ESP, 0), Immediate(offset));
-  }
-  popl(Address(EBP, kPcMarkerSlotFromFp * kWordSize));
+
   if (extra_size != 0) {
     subl(ESP, Immediate(extra_size));
   }
 }
 
 
 void Assembler::EnterStubFrame() {
-  EnterFrame(0);
-  pushl(Immediate(0));  // Push 0 in the saved PC area for stub frames.
+  EnterDartFrame(0);
 }
 
 
 void Assembler::Stop(const char* message) {
   if (FLAG_print_stop_message) {
     pushl(EAX);  // Preserve EAX.
     movl(EAX, Immediate(reinterpret_cast<int32_t>(message)));
     Call(*StubCode::PrintStopMessage_entry());  // Passing message in EAX.
     popl(EAX);  // Restore EAX.
   } else {
@@ skipping 285 matching lines @@
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_IA32