Rename RelocInfo::NONE to RelocInfo::NONE32.

src/arm/macro-assembler-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 286 matching lines @@
     vmov(dst, src);
   }
 }
 
 
 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
                          Condition cond) {
   if (!src2.is_reg() &&
       !src2.must_output_reloc_info(this) &&
       src2.immediate() == 0) {
-    mov(dst, Operand(0, RelocInfo::NONE), LeaveCC, cond);
+    mov(dst, Operand(0, RelocInfo::NONE32), LeaveCC, cond);
   } else if (!src2.is_single_instruction(this) &&
              !src2.must_output_reloc_info(this) &&
              CpuFeatures::IsSupported(ARMv7) &&
              IsPowerOf2(src2.immediate() + 1)) {
     ubfx(dst, src1, 0,
         WhichPowerOf2(static_cast<uint32_t>(src2.immediate()) + 1), cond);
   } else {
     and_(dst, src1, src2, LeaveCC, cond);
   }
 }
@@ skipping 85 matching lines @@
     int satval = (1 << satpos) - 1;
 
     if (cond != al) {
       b(NegateCondition(cond), &done);  // Skip saturate if !condition.
     }
     if (!(src.is_reg() && dst.is(src.rm()))) {
       mov(dst, src);
     }
     tst(dst, Operand(~satval));
     b(eq, &done);
-    mov(dst, Operand(0, RelocInfo::NONE), LeaveCC, mi);  // 0 if negative.
+    mov(dst, Operand(0, RelocInfo::NONE32), LeaveCC, mi);  // 0 if negative.
     mov(dst, Operand(satval), LeaveCC, pl);  // satval if positive.
     bind(&done);
   } else {
     usat(dst, satpos, src, cond);
   }
 }
 
 
 void MacroAssembler::LoadRoot(Register destination,
                               Heap::RootListIndex index,
@@ skipping 517 matching lines @@
     // Calculate the stack location of the saved doubles and restore them.
     const int offset = 2 * kPointerSize;
     sub(r3, fp, Operand(offset + DwVfpRegister::kNumRegisters * kDoubleSize));
     DwVfpRegister first = d0;
     DwVfpRegister last =
         DwVfpRegister::from_code(DwVfpRegister::kNumRegisters - 1);
     vldm(ia, r3, first, last);
   }
 
   // Clear top frame.
-  mov(r3, Operand(0, RelocInfo::NONE));
+  mov(r3, Operand(0, RelocInfo::NONE32));
   mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
   str(r3, MemOperand(ip));
 
   // Restore current context from top and clear it in debug mode.
   mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
   ldr(cp, MemOperand(ip));
 #ifdef DEBUG
   str(r3, MemOperand(ip));
 #endif
 
@@ skipping 249 matching lines @@
 
   ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
   ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
   tst(scratch, Operand(kIsNotStringMask));
   b(ne, fail);
 }
 
 
 #ifdef ENABLE_DEBUGGER_SUPPORT
 void MacroAssembler::DebugBreak() {
-  mov(r0, Operand(0, RelocInfo::NONE));
+  mov(r0, Operand(0, RelocInfo::NONE32));
   mov(r1, Operand(ExternalReference(Runtime::kDebugBreak, isolate())));
   CEntryStub ces(1);
   ASSERT(AllowThisStubCall(&ces));
   Call(ces.GetCode(), RelocInfo::DEBUG_BREAK);
 }
 #endif
 
 
 void MacroAssembler::PushTryHandler(StackHandler::Kind kind,
                                     int handler_index) {
@@ skipping 10 matching lines @@
   // Set up the code object (r5) and the state (r6) for pushing.
   unsigned state =
       StackHandler::IndexField::encode(handler_index) |
       StackHandler::KindField::encode(kind);
   mov(r5, Operand(CodeObject()));
   mov(r6, Operand(state));
 
   // Push the frame pointer, context, state, and code object.
   if (kind == StackHandler::JS_ENTRY) {
     mov(r7, Operand(Smi::FromInt(0)));  // Indicates no context.
-    mov(ip, Operand(0, RelocInfo::NONE));  // NULL frame pointer.
+    mov(ip, Operand(0, RelocInfo::NONE32));  // NULL frame pointer.
     stm(db_w, sp, r5.bit() | r6.bit() | r7.bit() | ip.bit());
   } else {
     stm(db_w, sp, r5.bit() | r6.bit() | cp.bit() | fp.bit());
   }
 
   // Link the current handler as the next handler.
   mov(r6, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
   ldr(r5, MemOperand(r6));
   push(r5);
   // Set this new handler as the current one.
@@ skipping 103 matching lines @@
   Label same_contexts;
 
   ASSERT(!holder_reg.is(scratch));
   ASSERT(!holder_reg.is(ip));
   ASSERT(!scratch.is(ip));
 
   // Load current lexical context from the stack frame.
   ldr(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
   // In debug mode, make sure the lexical context is set.
 #ifdef DEBUG
-  cmp(scratch, Operand(0, RelocInfo::NONE));
+  cmp(scratch, Operand(0, RelocInfo::NONE32));
   Check(ne, "we should not have an empty lexical context");
 #endif
 
   // Load the native context of the current context.
   int offset =
       Context::kHeaderSize + Context::GLOBAL_OBJECT_INDEX * kPointerSize;
   ldr(scratch, FieldMemOperand(scratch, offset));
   ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
 
   // Check the context is a native context.
@@ skipping 1062 matching lines @@
     Label right_exponent, done;
     // Get exponent word.
     ldr(scratch, FieldMemOperand(source, HeapNumber::kExponentOffset));
     // Get exponent alone in scratch2.
     Ubfx(scratch2,
          scratch,
          HeapNumber::kExponentShift,
          HeapNumber::kExponentBits);
     // Load dest with zero.  We use this either for the final shift or
     // for the answer.
-    mov(dest, Operand(0, RelocInfo::NONE));
+    mov(dest, Operand(0, RelocInfo::NONE32));
     // Check whether the exponent matches a 32 bit signed int that is not a Smi.
     // A non-Smi integer is 1.xxx * 2^30 so the exponent is 30 (biased). This is
     // the exponent that we are fastest at and also the highest exponent we can
     // handle here.
     const uint32_t non_smi_exponent = HeapNumber::kExponentBias + 30;
     // The non_smi_exponent, 0x41d, is too big for ARM's immediate field so we
     // split it up to avoid a constant pool entry.  You can't do that in general
     // for cmp because of the overflow flag, but we know the exponent is in the
     // range 0-2047 so there is no overflow.
     int fudge_factor = 0x400;
@@ skipping 33 matching lines @@
     tst(scratch, Operand(HeapNumber::kSignMask));
     // Get the second half of the double. For some exponents we don't
     // actually need this because the bits get shifted out again, but
     // it's probably slower to test than just to do it.
     ldr(scratch, FieldMemOperand(source, HeapNumber::kMantissaOffset));
     // Shift down 22 bits to get the last 10 bits.
     orr(scratch, scratch2, Operand(scratch, LSR, 32 - shift_distance));
     // Move down according to the exponent.
     mov(dest, Operand(scratch, LSR, dest));
     // Fix sign if sign bit was set.
-    rsb(dest, dest, Operand(0, RelocInfo::NONE), LeaveCC, ne);
+    rsb(dest, dest, Operand(0, RelocInfo::NONE32), LeaveCC, ne);
     bind(&done);
   }
 }
 
 
 void MacroAssembler::TryFastDoubleToInt32(Register result,
                                           DwVfpRegister double_input,
                                           DwVfpRegister double_scratch,
                                           Label* done) {
   ASSERT(!double_input.is(double_scratch));
@@ skipping 837 matching lines @@
   ASSERT(!zeros.is(scratch));
   ASSERT(!scratch.is(ip));
   ASSERT(!source.is(ip));
   ASSERT(!zeros.is(ip));
 #ifdef CAN_USE_ARMV5_INSTRUCTIONS
   clz(zeros, source);  // This instruction is only supported after ARM5.
 #else
   // Order of the next two lines is important: zeros register
   // can be the same as source register.
   Move(scratch, source);
-  mov(zeros, Operand(0, RelocInfo::NONE));
+  mov(zeros, Operand(0, RelocInfo::NONE32));
   // Top 16.
   tst(scratch, Operand(0xffff0000));
   add(zeros, zeros, Operand(16), LeaveCC, eq);
   mov(scratch, Operand(scratch, LSL, 16), LeaveCC, eq);
   // Top 8.
   tst(scratch, Operand(0xff000000));
   add(zeros, zeros, Operand(8), LeaveCC, eq);
   mov(scratch, Operand(scratch, LSL, 8), LeaveCC, eq);
   // Top 4.
   tst(scratch, Operand(0xf0000000));
@@ skipping 560 matching lines @@
 void CodePatcher::EmitCondition(Condition cond) {
   Instr instr = Assembler::instr_at(masm_.pc_);
   instr = (instr & ~kCondMask) | cond;
   masm_.emit(instr);
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM