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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 379 | 379 |
| 380 | 380 |
| 381 // ----------------------------------------------------------------------------- | 381 // ----------------------------------------------------------------------------- |
| 382 // Machine instruction Operands | 382 // Machine instruction Operands |
| 383 | 383 |
| 384 // Class Operand represents a shifter operand in data processing instructions | 384 // Class Operand represents a shifter operand in data processing instructions |
| 385 class Operand BASE_EMBEDDED { | 385 class Operand BASE_EMBEDDED { |
| 386 public: | 386 public: |
| 387 // immediate | 387 // immediate |
| 388 INLINE(explicit Operand(int32_t immediate, | 388 INLINE(explicit Operand(int32_t immediate, |
| 389 RelocInfo::Mode rmode = RelocInfo::NONE)); | 389 RelocInfo::Mode rmode = RelocInfo::NONE32)); |
| 390 INLINE(static Operand Zero()) { | 390 INLINE(static Operand Zero()) { |
| 391 return Operand(static_cast<int32_t>(0)); | 391 return Operand(static_cast<int32_t>(0)); |
| 392 } | 392 } |
| 393 INLINE(explicit Operand(const ExternalReference& f)); | 393 INLINE(explicit Operand(const ExternalReference& f)); |
| 394 explicit Operand(Handle<Object> handle); | 394 explicit Operand(Handle<Object> handle); |
| 395 INLINE(explicit Operand(Smi* value)); | 395 INLINE(explicit Operand(Smi* value)); |
| 396 | 396 |
| 397 // rm | 397 // rm |
| 398 INLINE(explicit Operand(Register rm)); | 398 INLINE(explicit Operand(Register rm)); |
| 399 | 399 |
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| 1480 public: | 1480 public: |
| 1481 explicit EnsureSpace(Assembler* assembler) { | 1481 explicit EnsureSpace(Assembler* assembler) { |
| 1482 assembler->CheckBuffer(); | 1482 assembler->CheckBuffer(); |
| 1483 } | 1483 } |
| 1484 }; | 1484 }; |
| 1485 | 1485 |
| 1486 | 1486 |
| 1487 } } // namespace v8::internal | 1487 } } // namespace v8::internal |
| 1488 | 1488 |
| 1489 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1489 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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