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Issue 11695006: Cleanup RelocInfo::NONE usage. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 11 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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798 return ((pc_offset() - L->pos()) < kMaxBranchOffset - 4 * kInstrSize); 798 return ((pc_offset() - L->pos()) < kMaxBranchOffset - 4 * kInstrSize);
799 } 799 }
800 return false; 800 return false;
801 } 801 }
802 802
803 // We have to use a temporary register for things that can be relocated even 803 // We have to use a temporary register for things that can be relocated even
804 // if they can be encoded in the MIPS's 16 bits of immediate-offset instruction 804 // if they can be encoded in the MIPS's 16 bits of immediate-offset instruction
805 // space. There is no guarantee that the relocated location can be similarly 805 // space. There is no guarantee that the relocated location can be similarly
806 // encoded. 806 // encoded.
807 bool Assembler::MustUseReg(RelocInfo::Mode rmode) { 807 bool Assembler::MustUseReg(RelocInfo::Mode rmode) {
808 return rmode != RelocInfo::NONE; 808 return !RelocInfo::IsNone(rmode);
809 } 809 }
810 810
811 void Assembler::GenInstrRegister(Opcode opcode, 811 void Assembler::GenInstrRegister(Opcode opcode,
812 Register rs, 812 Register rs,
813 Register rt, 813 Register rt,
814 Register rd, 814 Register rd,
815 uint16_t sa, 815 uint16_t sa,
816 SecondaryField func) { 816 SecondaryField func) {
817 ASSERT(rd.is_valid() && rs.is_valid() && rt.is_valid() && is_uint5(sa)); 817 ASSERT(rd.is_valid() && rs.is_valid() && rt.is_valid() && is_uint5(sa));
818 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) 818 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
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1983 // We do not try to reuse pool constants. 1983 // We do not try to reuse pool constants.
1984 RelocInfo rinfo(pc_, rmode, data, NULL); 1984 RelocInfo rinfo(pc_, rmode, data, NULL);
1985 if (rmode >= RelocInfo::JS_RETURN && rmode <= RelocInfo::DEBUG_BREAK_SLOT) { 1985 if (rmode >= RelocInfo::JS_RETURN && rmode <= RelocInfo::DEBUG_BREAK_SLOT) {
1986 // Adjust code for new modes. 1986 // Adjust code for new modes.
1987 ASSERT(RelocInfo::IsDebugBreakSlot(rmode) 1987 ASSERT(RelocInfo::IsDebugBreakSlot(rmode)
1988 || RelocInfo::IsJSReturn(rmode) 1988 || RelocInfo::IsJSReturn(rmode)
1989 || RelocInfo::IsComment(rmode) 1989 || RelocInfo::IsComment(rmode)
1990 || RelocInfo::IsPosition(rmode)); 1990 || RelocInfo::IsPosition(rmode));
1991 // These modes do not need an entry in the constant pool. 1991 // These modes do not need an entry in the constant pool.
1992 } 1992 }
1993 if (rinfo.rmode() != RelocInfo::NONE) { 1993 if (!RelocInfo::IsNone(rinfo.rmode())) {
1994 // Don't record external references unless the heap will be serialized. 1994 // Don't record external references unless the heap will be serialized.
1995 if (rmode == RelocInfo::EXTERNAL_REFERENCE) { 1995 if (rmode == RelocInfo::EXTERNAL_REFERENCE) {
1996 #ifdef DEBUG 1996 #ifdef DEBUG
1997 if (!Serializer::enabled()) { 1997 if (!Serializer::enabled()) {
1998 Serializer::TooLateToEnableNow(); 1998 Serializer::TooLateToEnableNow();
1999 } 1999 }
2000 #endif 2000 #endif
2001 if (!Serializer::enabled() && !emit_debug_code()) { 2001 if (!Serializer::enabled() && !emit_debug_code()) {
2002 return; 2002 return;
2003 } 2003 }
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2240 } 2240 }
2241 2241
2242 if (patched) { 2242 if (patched) {
2243 CPU::FlushICache(pc+2, sizeof(Address)); 2243 CPU::FlushICache(pc+2, sizeof(Address));
2244 } 2244 }
2245 } 2245 }
2246 2246
2247 } } // namespace v8::internal 2247 } } // namespace v8::internal
2248 2248
2249 #endif // V8_TARGET_ARCH_MIPS 2249 #endif // V8_TARGET_ARCH_MIPS
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