Generate the TransitionElementsStub using Crankshaft

src/arm/deoptimizer-arm.cc

Index: src/arm/deoptimizer-arm.cc
diff --git a/src/arm/deoptimizer-arm.cc b/src/arm/deoptimizer-arm.cc
index a822a8e239f142813ef5838a71cb51cd986949ca..28395490b649af8636879c7d9ba4a538b8495ade 100644
--- a/src/arm/deoptimizer-arm.cc
+++ b/src/arm/deoptimizer-arm.cc
@@ -1162,21 +1162,18 @@ void Deoptimizer::EntryGenerator::Generate() {
 
   if (CpuFeatures::IsSupported(VFP2)) {
     CpuFeatures::Scope scope(VFP2);
-    // In case of OSR, we have to restore the d registers.
-    if (type() == OSR) {
-      // Check CPU flags for number of registers, setting the Z condition flag.
-      __ CheckFor32DRegs(ip);
-
-      __ ldr(r1, MemOperand(r4, Deoptimizer::input_offset()));
-      int src_offset = FrameDescription::double_registers_offset();
-      for (int i = 0; i < DwVfpRegister::kNumRegisters; ++i) {
-        if (i == kDoubleRegZero.code()) continue;
-        if (i == kScratchDoubleReg.code()) continue;
-
-        const DwVfpRegister reg = DwVfpRegister::from_code(i);
-        __ vldr(reg, r1, src_offset, i < 16 ? al : ne);
-        src_offset += kDoubleSize;
-      }
+    // Check CPU flags for number of registers, setting the Z condition flag.
+    __ CheckFor32DRegs(ip);
+
+    __ ldr(r1, MemOperand(r4, Deoptimizer::input_offset()));
+    int src_offset = FrameDescription::double_registers_offset();
+    for (int i = 0; i < DwVfpRegister::kNumRegisters; ++i) {
+      if (i == kDoubleRegZero.code()) continue;
+      if (i == kScratchDoubleReg.code()) continue;
+
+      const DwVfpRegister reg = DwVfpRegister::from_code(i);
+      __ vldr(reg, r1, src_offset, i < 16 ? al : ne);
+      src_offset += kDoubleSize;
     }
   }