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Side by Side Diff: src/trusted/validator_arm/inst_classes_testers.h

Issue 11569019: Fix uses in ARM table media_instructions. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years ago
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1 /* 1 /*
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be 3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file. 4 * found in the LICENSE file.
5 */ 5 */
6 6
7 // Defines decoder testers for decoder classes. 7 // Defines decoder testers for decoder classes.
8 8
9 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_INST_CLASSES_TESTERS_H_ 9 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_INST_CLASSES_TESTERS_H_
10 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_INST_CLASSES_TESTERS_H_ 10 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_INST_CLASSES_TESTERS_H_
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435 // +--------+--------------+----------+--------+----------+--------------+ 435 // +--------+--------------+----------+--------+----------+--------------+
436 // Definitions 436 // Definitions
437 // Rd = The destination register. 437 // Rd = The destination register.
438 // lsb = The least significant bit to be modified. 438 // lsb = The least significant bit to be modified.
439 // msb = lsb + width - 1 - The most significant bit to be modified 439 // msb = lsb + width - 1 - The most significant bit to be modified
440 // width = msb - lsb + 1 - The number of bits to be modified. 440 // width = msb - lsb + 1 - The number of bits to be modified.
441 // 441 //
442 // If Rd is R15 or msb < lsb, the instruction is unpredictable. 442 // If Rd is R15 or msb < lsb, the instruction is unpredictable.
443 // NaCl disallows writing to PC to cause a jump. 443 // NaCl disallows writing to PC to cause a jump.
444 // Note: Currently, only implements bfc. (A8-46). 444 // Note: Currently, only implements bfc. (A8-46).
445 class Unary1RegisterBitRangeMsbGeLsbTesterRegsNotPc : public CondDecoderTester { 445 class Unary1RegisterBitRangeMsbGeLsbTester : public CondDecoderTester {
446 public: 446 public:
447 explicit Unary1RegisterBitRangeMsbGeLsbTesterRegsNotPc( 447 explicit Unary1RegisterBitRangeMsbGeLsbTester(
448 const NamedClassDecoder& decoder); 448 const NamedClassDecoder& decoder);
449 virtual bool ApplySanityChecks(nacl_arm_dec::Instruction inst, 449 virtual bool ApplySanityChecks(nacl_arm_dec::Instruction inst,
450 const NamedClassDecoder& decoder); 450 const NamedClassDecoder& decoder);
451 451
452 protected: 452 protected:
453 nacl_arm_dec::Unary1RegisterBitRangeMsbGeLsb expected_decoder_; 453 nacl_arm_dec::Unary1RegisterBitRangeMsbGeLsb expected_decoder_;
454 454
455 private: 455 private:
456 NACL_DISALLOW_COPY_AND_ASSIGN(Unary1RegisterBitRangeMsbGeLsbTesterRegsNotPc); 456 NACL_DISALLOW_COPY_AND_ASSIGN(Unary1RegisterBitRangeMsbGeLsbTester);
457 }; 457 };
458 458
459 // Models a 2-register binary operation with two immediate values 459 // Models a 2-register binary operation with two immediate values
460 // defining a bit range. 460 // defining a bit range.
461 // Op<c> Rd, Rn, #<lsb>, #width 461 // Op<c> Rd, Rn, #<lsb>, #width
462 // +--------+--------------+----------+--------+----------+------+--------+ 462 // +--------+--------------+----------+--------+----------+------+--------+
463 // |31302928|27262524232221|2019181716|15141312|1110 9 8 7| 6 5 4| 3 2 1 0| 463 // |31302928|27262524232221|2019181716|15141312|1110 9 8 7| 6 5 4| 3 2 1 0|
464 // +--------+--------------+----------+--------+----------+------+--------+ 464 // +--------+--------------+----------+--------+----------+------+--------+
465 // | cond | | msb | Rd | lsb | | Rn | 465 // | cond | | msb | Rd | lsb | | Rn |
466 // +--------+--------------+----------+--------+----------+------+--------+ 466 // +--------+--------------+----------+--------+----------+------+--------+
467 // Definitions: 467 // Definitions:
468 // Rd = The destination register. 468 // Rd = The destination register.
469 // Rn = The first operand 469 // Rn = The first operand
470 // lsb = The least significant bit to be modified. 470 // lsb = The least significant bit to be modified.
471 // msb = The most significant bit to be modified. 471 // msb = The most significant bit to be modified.
472 // 472 //
473 // If Rd=R15 or msb < lsb, the instruction is unpredictable. 473 // If Rd=R15 or msb < lsb, the instruction is unpredictable.
474 // 474 //
475 // NaCl disallows writing Pc to cause a jump. 475 // NaCl disallows writing Pc to cause a jump.
476 class Binary2RegisterBitRangeMsbGeLsbTesterRegsNotPc 476 class Binary2RegisterBitRangeMsbGeLsbTester
477 : public CondDecoderTester { 477 : public CondDecoderTester {
478 public: 478 public:
479 explicit Binary2RegisterBitRangeMsbGeLsbTesterRegsNotPc( 479 explicit Binary2RegisterBitRangeMsbGeLsbTester(
480 const NamedClassDecoder& decoder); 480 const NamedClassDecoder& decoder);
481 virtual bool ApplySanityChecks(nacl_arm_dec::Instruction inst, 481 virtual bool ApplySanityChecks(nacl_arm_dec::Instruction inst,
482 const NamedClassDecoder& decoder); 482 const NamedClassDecoder& decoder);
483 483
484 protected: 484 protected:
485 nacl_arm_dec::Binary2RegisterBitRangeMsbGeLsb expected_decoder_; 485 nacl_arm_dec::Binary2RegisterBitRangeMsbGeLsb expected_decoder_;
486 486
487 private: 487 private:
488 NACL_DISALLOW_COPY_AND_ASSIGN( 488 NACL_DISALLOW_COPY_AND_ASSIGN(
489 Binary2RegisterBitRangeMsbGeLsbTesterRegsNotPc); 489 Binary2RegisterBitRangeMsbGeLsbTester);
490 }; 490 };
491 491
492 // Implements a Binary2RegisterBitRangeNotRnIsPcBitfieldExtract tester. 492 // Implements a Binary2RegisterBitRangeNotRnIsPcBitfieldExtracttester.
493 class Binary2RegisterBitRangeNotRnIsPcBitfieldExtractTesterRegsNotPc 493 class Binary2RegisterBitRangeNotRnIsPcBitfieldExtractTester
494 : public CondDecoderTester { 494 : public CondDecoderTester {
495 public: 495 public:
496 explicit Binary2RegisterBitRangeNotRnIsPcBitfieldExtractTesterRegsNotPc( 496 explicit Binary2RegisterBitRangeNotRnIsPcBitfieldExtractTester(
497 const NamedClassDecoder& decoder); 497 const NamedClassDecoder& decoder);
498 virtual bool ApplySanityChecks(nacl_arm_dec::Instruction inst, 498 virtual bool ApplySanityChecks(nacl_arm_dec::Instruction inst,
499 const NamedClassDecoder& decoder); 499 const NamedClassDecoder& decoder);
500 500
501 protected: 501 protected:
502 nacl_arm_dec::Binary2RegisterBitRangeNotRnIsPcBitfieldExtract 502 nacl_arm_dec::Binary2RegisterBitRangeNotRnIsPcBitfieldExtract
503 expected_decoder_; 503 expected_decoder_;
504 504
505 private: 505 private:
506 NACL_DISALLOW_COPY_AND_ASSIGN( 506 NACL_DISALLOW_COPY_AND_ASSIGN(
507 Binary2RegisterBitRangeNotRnIsPcBitfieldExtractTesterRegsNotPc); 507 Binary2RegisterBitRangeNotRnIsPcBitfieldExtractTester);
508 }; 508 };
509 509
510 // Implements a decoder tester for decoder BinaryRegisterImmediateTest 510 // Implements a decoder tester for decoder BinaryRegisterImmediateTest
511 // Op(S)<c> Rn, #<const> 511 // Op(S)<c> Rn, #<const>
512 // +--------+--------------+--+--------+--------+------------------------+ 512 // +--------+--------------+--+--------+--------+------------------------+
513 // |31302928|27262524232221|20|19181716|15141312|1110 9 8 7 6 5 4 3 2 1 0| 513 // |31302928|27262524232221|20|19181716|15141312|1110 9 8 7 6 5 4 3 2 1 0|
514 // +--------+--------------+--+--------+--------+------------------------+ 514 // +--------+--------------+--+--------+--------+------------------------+
515 // | cond | | S| Rn | | imm12 | 515 // | cond | | S| Rn | | imm12 |
516 // +--------+--------------+--+--------+--------+------------------------+ 516 // +--------+--------------+--+--------+--------+------------------------+
517 // Definitions: 517 // Definitions:
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2723 nacl_arm_dec::Instruction inst, 2723 nacl_arm_dec::Instruction inst,
2724 const NamedClassDecoder& decoder); 2724 const NamedClassDecoder& decoder);
2725 2725
2726 private: 2726 private:
2727 NACL_DISALLOW_COPY_AND_ASSIGN(PermanentlyUndefinedTester); 2727 NACL_DISALLOW_COPY_AND_ASSIGN(PermanentlyUndefinedTester);
2728 }; 2728 };
2729 2729
2730 } // namespace nacl_arm_test 2730 } // namespace nacl_arm_test
2731 2731
2732 #endif // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_INST_CLASSES_TESTERS_H_ 2732 #endif // NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_ARM_INST_CLASSES_TESTERS_H_
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