OLD | NEW |
1 /* | 1 /* |
2 * Copyright 2012 The Native Client Authors. All rights reserved. | 2 * Copyright 2012 The Native Client Authors. All rights reserved. |
3 * Use of this source code is governed by a BSD-style license that can | 3 * Use of this source code is governed by a BSD-style license that can |
4 * be found in the LICENSE file. | 4 * be found in the LICENSE file. |
5 */ | 5 */ |
6 | 6 |
7 // DO NOT EDIT: GENERATED CODE | 7 // DO NOT EDIT: GENERATED CODE |
8 | 8 |
9 #ifndef NACL_TRUSTED_BUT_NOT_TCB | 9 #ifndef NACL_TRUSTED_BUT_NOT_TCB |
10 #error This file is not meant for use in the TCB | 10 #error This file is not meant for use in the TCB |
(...skipping 1322 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1333 /* | 1333 /* |
1334 * Implementation of table media_instructions. | 1334 * Implementation of table media_instructions. |
1335 * Specified by: ('See Section A5.4',) | 1335 * Specified by: ('See Section A5.4',) |
1336 */ | 1336 */ |
1337 const NamedClassDecoder& NamedArm32DecoderState::decode_media_instructions( | 1337 const NamedClassDecoder& NamedArm32DecoderState::decode_media_instructions( |
1338 const nacl_arm_dec::Instruction inst) const { | 1338 const nacl_arm_dec::Instruction inst) const { |
1339 | 1339 |
1340 if ((inst.Bits() & 0x01F00000) == 0x01800000 /* op1(24:20)=11000 */ && | 1340 if ((inst.Bits() & 0x01F00000) == 0x01800000 /* op1(24:20)=11000 */ && |
1341 (inst.Bits() & 0x000000E0) == 0x00000000 /* op2(7:5)=000 */ && | 1341 (inst.Bits() & 0x000000E0) == 0x00000000 /* op2(7:5)=000 */ && |
1342 (inst.Bits() & 0x0000F000) != 0x0000F000 /* Rd(15:12)=~1111 */) { | 1342 (inst.Bits() & 0x0000F000) != 0x0000F000 /* Rd(15:12)=~1111 */) { |
1343 return Binary4RegisterDualOp_Usada8_Rule_254_A1_P502_instance_; | 1343 return Binary4RegisterDualOp_USADA8_instance_; |
1344 } | 1344 } |
1345 | 1345 |
1346 if ((inst.Bits() & 0x01F00000) == 0x01800000 /* op1(24:20)=11000 */ && | 1346 if ((inst.Bits() & 0x01F00000) == 0x01800000 /* op1(24:20)=11000 */ && |
1347 (inst.Bits() & 0x000000E0) == 0x00000000 /* op2(7:5)=000 */ && | 1347 (inst.Bits() & 0x000000E0) == 0x00000000 /* op2(7:5)=000 */ && |
1348 (inst.Bits() & 0x0000F000) == 0x0000F000 /* Rd(15:12)=1111 */) { | 1348 (inst.Bits() & 0x0000F000) == 0x0000F000 /* Rd(15:12)=1111 */) { |
1349 return Binary3RegisterOpAltA_Usad8_Rule_253_A1_P500_instance_; | 1349 return Binary3RegisterOpAltA_USAD8_instance_; |
1350 } | 1350 } |
1351 | 1351 |
1352 if ((inst.Bits() & 0x01F00000) == 0x01F00000 /* op1(24:20)=11111 */ && | 1352 if ((inst.Bits() & 0x01F00000) == 0x01F00000 /* op1(24:20)=11111 */ && |
1353 (inst.Bits() & 0x000000E0) == 0x000000E0 /* op2(7:5)=111 */) { | 1353 (inst.Bits() & 0x000000E0) == 0x000000E0 /* op2(7:5)=111 */) { |
1354 return PermanentlyUndefined_Udf_Rule_A1_instance_; | 1354 return PermanentlyUndefined_UDF_instance_; |
1355 } | 1355 } |
1356 | 1356 |
1357 if ((inst.Bits() & 0x01E00000) == 0x01A00000 /* op1(24:20)=1101x */ && | 1357 if ((inst.Bits() & 0x01E00000) == 0x01A00000 /* op1(24:20)=1101x */ && |
1358 (inst.Bits() & 0x00000060) == 0x00000040 /* op2(7:5)=x10 */) { | 1358 (inst.Bits() & 0x00000060) == 0x00000040 /* op2(7:5)=x10 */) { |
1359 return Binary2RegisterBitRangeNotRnIsPcBitfieldExtract_Sbfx_Rule_154_A1_P308
_instance_; | 1359 return Binary2RegisterBitRangeNotRnIsPcBitfieldExtract_SBFX_instance_; |
1360 } | 1360 } |
1361 | 1361 |
1362 if ((inst.Bits() & 0x01E00000) == 0x01C00000 /* op1(24:20)=1110x */ && | 1362 if ((inst.Bits() & 0x01E00000) == 0x01C00000 /* op1(24:20)=1110x */ && |
1363 (inst.Bits() & 0x00000060) == 0x00000000 /* op2(7:5)=x00 */ && | 1363 (inst.Bits() & 0x00000060) == 0x00000000 /* op2(7:5)=x00 */ && |
1364 (inst.Bits() & 0x0000000F) != 0x0000000F /* Rn(3:0)=~1111 */) { | 1364 (inst.Bits() & 0x0000000F) != 0x0000000F /* Rn(3:0)=~1111 */) { |
1365 return Binary2RegisterBitRangeMsbGeLsb_Bfi_Rule_18_A1_P48_instance_; | 1365 return Binary2RegisterBitRangeMsbGeLsb_BFI_instance_; |
1366 } | 1366 } |
1367 | 1367 |
1368 if ((inst.Bits() & 0x01E00000) == 0x01C00000 /* op1(24:20)=1110x */ && | 1368 if ((inst.Bits() & 0x01E00000) == 0x01C00000 /* op1(24:20)=1110x */ && |
1369 (inst.Bits() & 0x00000060) == 0x00000000 /* op2(7:5)=x00 */ && | 1369 (inst.Bits() & 0x00000060) == 0x00000000 /* op2(7:5)=x00 */ && |
1370 (inst.Bits() & 0x0000000F) == 0x0000000F /* Rn(3:0)=1111 */) { | 1370 (inst.Bits() & 0x0000000F) == 0x0000000F /* Rn(3:0)=1111 */) { |
1371 return Unary1RegisterBitRangeMsbGeLsb_Bfc_17_A1_P46_instance_; | 1371 return Unary1RegisterBitRangeMsbGeLsb_BFC_instance_; |
1372 } | 1372 } |
1373 | 1373 |
1374 if ((inst.Bits() & 0x01E00000) == 0x01E00000 /* op1(24:20)=1111x */ && | 1374 if ((inst.Bits() & 0x01E00000) == 0x01E00000 /* op1(24:20)=1111x */ && |
1375 (inst.Bits() & 0x00000060) == 0x00000040 /* op2(7:5)=x10 */) { | 1375 (inst.Bits() & 0x00000060) == 0x00000040 /* op2(7:5)=x10 */) { |
1376 return Binary2RegisterBitRangeNotRnIsPcBitfieldExtract_Ubfx_Rule_236_A1_P466
_instance_; | 1376 return Binary2RegisterBitRangeNotRnIsPcBitfieldExtract_UBFX_instance_; |
1377 } | 1377 } |
1378 | 1378 |
1379 if ((inst.Bits() & 0x01C00000) == 0x00000000 /* op1(24:20)=000xx */) { | 1379 if ((inst.Bits() & 0x01C00000) == 0x00000000 /* op1(24:20)=000xx */) { |
1380 return decode_parallel_addition_and_subtraction_signed(inst); | 1380 return decode_parallel_addition_and_subtraction_signed(inst); |
1381 } | 1381 } |
1382 | 1382 |
1383 if ((inst.Bits() & 0x01C00000) == 0x00400000 /* op1(24:20)=001xx */) { | 1383 if ((inst.Bits() & 0x01C00000) == 0x00400000 /* op1(24:20)=001xx */) { |
1384 return decode_parallel_addition_and_subtraction_unsigned(inst); | 1384 return decode_parallel_addition_and_subtraction_unsigned(inst); |
1385 } | 1385 } |
1386 | 1386 |
(...skipping 2145 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
3532 decode_named(const nacl_arm_dec::Instruction inst) const { | 3532 decode_named(const nacl_arm_dec::Instruction inst) const { |
3533 return decode_ARMv7(inst); | 3533 return decode_ARMv7(inst); |
3534 } | 3534 } |
3535 | 3535 |
3536 const nacl_arm_dec::ClassDecoder& NamedArm32DecoderState:: | 3536 const nacl_arm_dec::ClassDecoder& NamedArm32DecoderState:: |
3537 decode(const nacl_arm_dec::Instruction inst) const { | 3537 decode(const nacl_arm_dec::Instruction inst) const { |
3538 return decode_named(inst).named_decoder(); | 3538 return decode_named(inst).named_decoder(); |
3539 } | 3539 } |
3540 | 3540 |
3541 } // namespace nacl_arm_test | 3541 } // namespace nacl_arm_test |
OLD | NEW |