Index: src/arm/constants-arm.cc |
diff --git a/src/arm/constants-arm.cc b/src/arm/constants-arm.cc |
index bf9da232cce572c6ac3081c1ccc2354caad286c5..cdca1f5310c636a803e8934a2b5a291d94e414a7 100644 |
--- a/src/arm/constants-arm.cc |
+++ b/src/arm/constants-arm.cc |
@@ -87,8 +87,8 @@ const char* Registers::Name(int reg) { |
} |
-// Support for VFP registers s0 to s31 (d0 to d15). |
-// Note that "sN:sM" is the same as "dN/2" |
+// Support for VFP registers s0 to s31 (d0 to d15) and d16-d31. |
+// Note that "sN:sM" is the same as "dN/2" up to d15. |
// These register names are defined in a way to match the native disassembler |
// formatting. See for example the command "objdump -d <binary file>". |
const char* VFPRegisters::names_[kNumVFPRegisters] = { |
@@ -97,7 +97,9 @@ const char* VFPRegisters::names_[kNumVFPRegisters] = { |
"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", |
"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", |
"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
- "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15" |
+ "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", |
+ "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", |
+ "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31" |
}; |