Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(55)

Side by Side Diff: test/cctest/test-assembler-arm.cc

Issue 11428137: ARM: Make use of d16-d31 when available. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Rebase Created 7 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/x64/assembler-x64.cc ('k') | test/cctest/test-disasm-arm.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1008 matching lines...) Expand 10 before | Expand all | Expand 10 after
1019 v8::HandleScope scope; 1019 v8::HandleScope scope;
1020 Assembler assm(Isolate::Current(), NULL, 0); 1020 Assembler assm(Isolate::Current(), NULL, 0);
1021 1021
1022 Label target; 1022 Label target;
1023 __ b(eq, &target); 1023 __ b(eq, &target);
1024 __ b(ne, &target); 1024 __ b(ne, &target);
1025 __ bind(&target); 1025 __ bind(&target);
1026 __ nop(); 1026 __ nop();
1027 } 1027 }
1028 1028
1029
1030 TEST(13) {
1031 // Test VFP instructions using registers d16-d31.
1032 InitializeVM();
1033 v8::HandleScope scope;
1034
1035 if (!CpuFeatures::IsSupported(VFP32DREGS)) {
1036 return;
1037 }
1038
1039 typedef struct {
1040 double a;
1041 double b;
1042 double c;
1043 double x;
1044 double y;
1045 double z;
1046 double i;
1047 double j;
1048 double k;
1049 } T;
1050 T t;
1051
1052 // Create a function that accepts &t, and loads, manipulates, and stores
1053 // the doubles and floats.
1054 Assembler assm(Isolate::Current(), NULL, 0);
1055 Label L, C;
1056
1057
1058 if (CpuFeatures::IsSupported(VFP3)) {
1059 CpuFeatures::Scope scope(VFP3);
1060
1061 __ stm(db_w, sp, r4.bit() | lr.bit());
1062
1063 // Load a, b, c into d16, d17, d18.
1064 __ mov(r4, Operand(r0));
1065 __ vldr(d16, r4, OFFSET_OF(T, a));
1066 __ vldr(d17, r4, OFFSET_OF(T, b));
1067 __ vldr(d18, r4, OFFSET_OF(T, c));
1068
1069 __ vneg(d25, d16);
1070 __ vadd(d25, d25, d17);
1071 __ vsub(d25, d25, d18);
1072 __ vmul(d25, d25, d25);
1073 __ vdiv(d25, d25, d18);
1074
1075 __ vmov(d16, d25);
1076 __ vsqrt(d17, d25);
1077 __ vneg(d17, d17);
1078 __ vabs(d17, d17);
1079 __ vmla(d18, d16, d17);
1080
1081 // Store d16, d17, d18 into a, b, c.
1082 __ mov(r4, Operand(r0));
1083 __ vstr(d16, r4, OFFSET_OF(T, a));
1084 __ vstr(d17, r4, OFFSET_OF(T, b));
1085 __ vstr(d18, r4, OFFSET_OF(T, c));
1086
1087 // Load x, y, z into d29-d31.
1088 __ add(r4, r0, Operand(OFFSET_OF(T, x)));
1089 __ vldm(ia_w, r4, d29, d31);
1090
1091 // Swap d29 and d30 via r registers.
1092 __ vmov(r1, r2, d29);
1093 __ vmov(d29, d30);
1094 __ vmov(d30, r1, r2);
1095
1096 // Convert to and from integer.
1097 __ vcvt_s32_f64(s1, d31);
1098 __ vcvt_f64_u32(d31, s1);
1099
1100 // Store d29-d31 into x, y, z.
1101 __ add(r4, r0, Operand(OFFSET_OF(T, x)));
1102 __ vstm(ia_w, r4, d29, d31);
1103
1104 // Move constants into d20, d21, d22 and store into i, j, k.
1105 __ vmov(d20, 14.7610017472335499);
1106 __ vmov(d21, 16.0);
1107 __ mov(r1, Operand(372106121));
1108 __ mov(r2, Operand(1079146608));
1109 __ vmov(d22, 0, r1);
1110 __ vmov(d22, 1, r2);
1111 __ add(r4, r0, Operand(OFFSET_OF(T, i)));
1112 __ vstm(ia_w, r4, d20, d22);
1113
1114 __ ldm(ia_w, sp, r4.bit() | pc.bit());
1115
1116 CodeDesc desc;
1117 assm.GetCode(&desc);
1118 Object* code = HEAP->CreateCode(
1119 desc,
1120 Code::ComputeFlags(Code::STUB),
1121 Handle<Object>(HEAP->undefined_value()))->ToObjectChecked();
1122 CHECK(code->IsCode());
1123 #ifdef DEBUG
1124 Code::cast(code)->Print();
1125 #endif
1126 F3 f = FUNCTION_CAST<F3>(Code::cast(code)->entry());
1127 t.a = 1.5;
1128 t.b = 2.75;
1129 t.c = 17.17;
1130 t.x = 1.5;
1131 t.y = 2.75;
1132 t.z = 17.17;
1133 Object* dummy = CALL_GENERATED_CODE(f, &t, 0, 0, 0, 0);
1134 USE(dummy);
1135 CHECK_EQ(14.7610017472335499, t.a);
1136 CHECK_EQ(3.84200491244266251, t.b);
1137 CHECK_EQ(73.8818412254460241, t.c);
1138 CHECK_EQ(2.75, t.x);
1139 CHECK_EQ(1.5, t.y);
1140 CHECK_EQ(17.0, t.z);
1141 CHECK_EQ(14.7610017472335499, t.i);
1142 CHECK_EQ(16.0, t.j);
1143 CHECK_EQ(73.8818412254460241, t.k);
1144 }
1145 }
1146
1029 #undef __ 1147 #undef __
OLDNEW
« no previous file with comments | « src/x64/assembler-x64.cc ('k') | test/cctest/test-disasm-arm.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698