ARM: make MacroAssembler::LoadRoot emit exactly one instruction when in predictable code size scope.

src/arm/codegen-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 588 matching lines @@
 
 static byte* GetNoCodeAgeSequence(uint32_t* length) {
   // The sequence of instructions that is patched out for aging code is the
   // following boilerplate stack-building prologue that is found in FUNCTIONS
   static bool initialized = false;
   static uint32_t sequence[kNoCodeAgeSequenceLength];
   byte* byte_sequence = reinterpret_cast<byte*>(sequence);
   *length = kNoCodeAgeSequenceLength * Assembler::kInstrSize;
   if (!initialized) {
     CodePatcher patcher(byte_sequence, kNoCodeAgeSequenceLength);
+    PredictableCodeSizeScope scope(patcher.masm(), *length);
     patcher.masm()->stm(db_w, sp, r1.bit() | cp.bit() | fp.bit() | lr.bit());
     patcher.masm()->LoadRoot(ip, Heap::kUndefinedValueRootIndex);
     patcher.masm()->add(fp, sp, Operand(2 * kPointerSize));
     initialized = true;
   }
   return byte_sequence;
 }
 
 
 bool Code::IsYoungSequence(byte* sequence) {
@@ skipping 34 matching lines @@
     patcher.masm()->add(r0, pc, Operand(-8));
     patcher.masm()->ldr(pc, MemOperand(pc, -4));
     patcher.masm()->dd(reinterpret_cast<uint32_t>(stub->instruction_start()));
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM