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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1843 emit(cond | d*B22 | 0xD0*B20 | ip.code()*B16 | sd*B12 | 0xA*B8); | 1843 emit(cond | d*B22 | 0xD0*B20 | ip.code()*B16 | sd*B12 | 0xA*B8); |
1844 } | 1844 } |
1845 } | 1845 } |
1846 | 1846 |
1847 | 1847 |
1848 void Assembler::vstr(const SwVfpRegister src, | 1848 void Assembler::vstr(const SwVfpRegister src, |
1849 const MemOperand& operand, | 1849 const MemOperand& operand, |
1850 const Condition cond) { | 1850 const Condition cond) { |
1851 ASSERT(!operand.rm().is_valid()); | 1851 ASSERT(!operand.rm().is_valid()); |
1852 ASSERT(operand.am_ == Offset); | 1852 ASSERT(operand.am_ == Offset); |
1853 vldr(src, operand.rn(), operand.offset(), cond); | 1853 vstr(src, operand.rn(), operand.offset(), cond); |
1854 } | 1854 } |
1855 | 1855 |
1856 | 1856 |
1857 void Assembler::vldm(BlockAddrMode am, | 1857 void Assembler::vldm(BlockAddrMode am, |
1858 Register base, | 1858 Register base, |
1859 DwVfpRegister first, | 1859 DwVfpRegister first, |
1860 DwVfpRegister last, | 1860 DwVfpRegister last, |
1861 Condition cond) { | 1861 Condition cond) { |
1862 // Instruction details available in ARM DDI 0406A, A8-626. | 1862 // Instruction details available in ARM DDI 0406A, A8-626. |
1863 // cond(31-28) | 110(27-25)| PUDW1(24-20) | Rbase(19-16) | | 1863 // cond(31-28) | 110(27-25)| PUDW1(24-20) | Rbase(19-16) | |
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2713 | 2713 |
2714 // Since a constant pool was just emitted, move the check offset forward by | 2714 // Since a constant pool was just emitted, move the check offset forward by |
2715 // the standard interval. | 2715 // the standard interval. |
2716 next_buffer_check_ = pc_offset() + kCheckPoolInterval; | 2716 next_buffer_check_ = pc_offset() + kCheckPoolInterval; |
2717 } | 2717 } |
2718 | 2718 |
2719 | 2719 |
2720 } } // namespace v8::internal | 2720 } } // namespace v8::internal |
2721 | 2721 |
2722 #endif // V8_TARGET_ARCH_ARM | 2722 #endif // V8_TARGET_ARCH_ARM |
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